3D Memory Array Structure With Insulative Pillars Against Block-Bending
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Solution Overview
Problem
The challenge in memory array fabrication is the occurrence of 'block-bending' during the process, where vertically-stacked memory cell blocks tilt sideways relative to their longitudinal orientation, leading to structural instability and potential defects in the memory array.
Innovation Solution
The method involves forming a memory array with vertically-alternating insulative and conductive tiers, where channel openings are etched through to directly couple the channel material with the conductor tier, and insulative pillars are created between memory blocks to stabilize the structure, allowing for the formation of strings of memory cells with improved structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If vertically-stacked memory cell blocks are formed without additional support structures, then the fabrication process is simpler, but block-bending occurs causing structural instability and defects
Solution Approach 1:
The memory array is divided into multiple memory blocks that are laterally-spaced and vertically-stacked. Each memory block is an independent unit containing channel openings, memory cells, and conductor tiers. This segmentation allows each block to be formed and stabilized independently, preventing block-bending while maintaining fabrication feasibility through modular construction processes.
Solution Approach 2:
Insulative pillars are introduced as intermediary support structures positioned between adjacent memory blocks. These pillars make lateral contact with the conductor tiers of neighboring blocks, providing mechanical support that prevents block-bending. The pillars act as mediators that transfer and distribute mechanical loads, stabilizing the vertically-stacked structure without interfering with the electrical functionality of the memory cells.
2Reliability
If channel openings are etched through the stack to directly couple channel material with conductor tier, then electrical coupling efficiency is improved, but manufacturing complexity increases
Solution Approach 1:
The insulative tiers are formed with pre-defined openings at specific locations before the conductor tiers and channel material are deposited. This preliminary action ensures that when channel material is later formed, it directly couples with the conductor tiers through these pre-established pathways, achieving efficient electrical coupling without requiring complex post-processing steps to create the connections.
Solution Approach 2:
The electrical coupling is achieved by transitioning from lateral connections to vertical connections through the stack height dimension. Channel openings extend vertically through multiple tiers, allowing channel material to directly contact conductor tiers at different elevation levels. This three-dimensional approach to electrical coupling improves efficiency by shortening current paths while the systematic formation process manages the manufacturing complexity.
3Reliability
If insulative pillars are added between memory blocks for stabilization, then structural integrity is improved, but device complexity increases
Solution Approach 1:
Insulative pillars are selectively positioned only at critical locations where mechanical support is needed between adjacent memory blocks, rather than uniformly throughout the entire structure. This localized approach provides necessary structural integrity to prevent block-bending while minimizing the addition of complex elements. The pillars are formed with specific dimensions and positioning that optimize their support function without excessive complexity.
Solution Approach 2:
The insulative pillars serve multiple functions simultaneously: they provide mechanical support to prevent block-bending, electrically isolate adjacent conductor tiers, and maintain the lateral spacing between memory blocks. This multi-functionality reduces the need for separate structures for each function, thereby limiting the increase in overall device complexity while achieving structural integrity.
Data Source
AI summary
A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Operative channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. Insulative pillars are laterally-between and longitudinally-spaced-along immediately-laterally-adjacent of the memory blocks. The pillars are directly against conducting material of conductive lines in the conductive tiers. Other arrays, and methods, are disclosed.