Configurable Memory Array Layout for Accurate Secure NVM Read
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Solution Overview
Problem
During the boot operation of non-volatile memory (NVM), the lack of a stable reference current from a bandgap or current reference block leads to unreliable read operations, as reliable trimming and configuration bits are not available, necessitating a differential read method that does not depend on a stable reference current.
Innovation Solution
A primary memory array is configured with test memory cells that store trimming and configuration bits for differential read, and a reference current is generated using a reference memory cell array, which is formed in the same process as the primary memory cells, allowing for accurate single-ended read operations by averaging currents from multiple memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a bandgap or current reference block is used to provide reference current for single-ended read operations, then read accuracy is improved, but during boot operation the reference current is unstable and unreliable
Solution Approach 1:
The patent performs trimming and configuration of the reference current block during manufacturing before the product is shipped. This preliminary action ensures that the reference current block is properly calibrated and will provide stable reference current during normal operation, resolving the contradiction between read accuracy and reference current stability during boot operation.
2Reliability
If differential read is used during boot operation to avoid dependency on reference current, then boot operation reliability is improved, but read accuracy may be compromised
Solution Approach 1:
The patent pre-conditions the memory cells during manufacturing by performing write operations and verifying read operations. This preliminary action ensures that the memory cells are properly programmed and will provide accurate read data during both boot operation and normal usage, resolving the contradiction between boot operation reliability and read accuracy.
3Adaptability or versatility
If memory array is configured with both user memory cells and test memory cells, then functionality is improved, but device complexity increases
Solution Approach 1:
The patent designs the memory array to serve multiple functions: user memory cells for data storage and test memory cells for trimming and configuration operations. This multi-functional design allows the same memory array structure to support both normal data storage operations and boot operation configuration, resolving the contradiction between functionality and device complexity by making the memory array universal.
Data Source
AI summary
The present disclosure is directed to arranging user data memory cells and test memory cells in a configurable memory array that can perform both differential and single ended read operations during memory start-up and normal memory use, respectively. Different arrangements of the user data memory cells and the test memory cells in the memory array result in increased effectiveness of memory array, in terms of area optimization, memory read accuracy and encryption for data security.