3D Memory Source Contacts at Array Edges
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Solution Overview
Problem
In 3D memory devices, a large number of source contacts within the memory array degrade efficiency, leading to increased die size and fabrication costs due to high sheet resistance and space overhead between blocks.
Innovation Solution
The implementation of divided sources and memory arrays with source conductors electrically coupled through source contacts adjacent to the edges of the sources, reducing source noise and eliminating the need for source routing within the array, thereby minimizing die size and fabrication costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If source contacts are placed inside the memory array, then electrical connection to sources is achieved, but the number of source contacts increases leading to degraded array efficiency and increased die size
Solution Approach 1:
The patent extracts source contacts from the interior of the memory array and relocates them to the periphery. Specifically, source contacts are positioned at the edges of the memory array where they can access multiple sources without penetrating through the array structure, thereby eliminating the need for numerous internal source contacts while maintaining electrical connectivity.
Solution Approach 2:
The patent transitions from a two-dimensional arrangement where source contacts are distributed across the array plane to a three-dimensional configuration where sources extend vertically and source contacts access them from the side at array edges. This dimensional change allows a single source contact to serve multiple sources stacked in the vertical direction.
2Reliability
If source contacts are placed inside the memory array, then electrical connection to sources is achieved, but die size and fabrication cost increase
Solution Approach 1:
The patent merges the function of multiple source contacts into fewer peripheral contacts. By positioning source contacts at the array edges, a single contact can electrically connect to multiple sources that are stacked vertically or arranged in close proximity, thereby reducing the total number of contacts and the associated die area.
Solution Approach 2:
Peripheral source contacts are designed to serve multiple functions and multiple sources simultaneously. Instead of dedicating one source contact per source, the peripheral contacts act as universal connection points that can access and connect to multiple sources through shared interconnection structures.
3Reliability
If source routing is implemented within the array, then sources are connected, but space overhead between blocks increases
Solution Approach 1:
The patent extracts the source routing function from the array interior and relocates it to the periphery. Source routing is performed outside the active memory array region, using edge-aligned structures that do not interfere with the internal array layout or require additional space between memory blocks.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces source noise and decreases die size while maintaining efficient current flow, resulting in lower fabrication costs and improved array efficiency.
Implementation Method 1
a first source conductor of the at least two divided sources and a second source conductor of the at least two divided sources may be electrically coupled to a data line through a common source contact
Data Source
AI summary
Various apparatuses, including three-dimensional (3D) memory devices and systems including the same, are described herein. In one embodiment, a 3D memory device can include at least two sources; at least two memory arrays respectively formed over and coupled to the at least two sources; and a source conductor electrically respectively coupled to the at least two sources using source contacts adjacent one or more edges of the source. Each of the at least two memory arrays can include memory cells, control gates, and data lines. There is no data line between an edge of a source and the source contacts adjacent the edge.