Memory Array Pillar and Word Line Plate Layout Without Deep Recesses

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing memory array architectures with word line combs require longer manufacturing times, higher costs, and lower reliability due to the need for deep recesses, which can compromise mechanical stability and memory cell density.

Innovation Solution

A memory array architecture featuring a word line plate at each level, where each pillar includes two electrodes separated by an insulating dielectric material, simplifying manufacturing and increasing reliability by allowing direct access to memory cells with reduced complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If word line combs with deep recesses are used, then memory cell density can be increased, but manufacturing time increases and reliability decreases

Engineering Contradiction:
Improvememory cell densityVSAvoidmanufacturing time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The memory array is divided into multiple tiers or levels, with each tier containing memory cells arranged in a grid pattern. Word lines are segmented to extend across multiple tiers at different heights, allowing the structure to achieve high density without requiring deep recesses in a single continuous structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a two-dimensional planar structure to a three-dimensional architecture by stacking multiple tiers vertically. Word lines are positioned at different heights (z-direction) to access memory cells on different tiers, enabling high density through vertical stacking rather than horizontal expansion or deep recesses.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If word line combs with deep recesses are used, then memory cell density can be increased, but manufacturing cost increases

Engineering Contradiction:
Improvememory cell densityVSAvoidmanufacturing cost
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The structure is segmented into discrete tiers separated by intermediate layers, allowing standard thin-film deposition and etching processes to be applied repeatedly at each tier rather than requiring complex single-step deep recess formation, thereby reducing manufacturing cost.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

By utilizing vertical stacking of tiers instead of deep horizontal recesses, the patent employs fabrication processes suitable for thin-film and planar technologies, avoiding the need for expensive deep trench etching and complex 3D processing equipment.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Quantity of substance

If word line combs with deep recesses are used, then memory cell density can be increased, but mechanical stability decreases

Engineering Contradiction:
Improvememory cell densityVSAvoidmechanical stability
Core Design Contradiction:
Quantity of substanceVSStability of the object's composition

Solution Approach 1:

The continuous deep recess structure is segmented into discrete tiers separated by intermediate layers. These intermediate layers act as mechanical support structures, distributing stress and preventing structural collapse, thereby maintaining mechanical stability while achieving high density through vertical segmentation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent distributes memory cells and word lines across multiple vertical levels rather than concentrating them in deep recesses. This vertical distribution creates a more mechanically stable structure where each tier is supported by intermediate layers, reducing the risk of structural failure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Quantity of substance

If word line combs with deep recesses are used, then memory cell density can be increased, but device complexity increases

Engineering Contradiction:
Improvememory cell densityVSAvoidarchitecture complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The memory array is segmented into identical or similar tiers, each with the same basic structure of memory cells and word lines. This modular repetition simplifies the overall architecture compared to complex deep recess structures, as each tier can be fabricated using the same process steps and has the same operational characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent achieves high density through vertical stacking of tiers with word lines at different heights, creating a regular repeating pattern. This systematic vertical arrangement is simpler to design and fabricate than irregular deep recess structures, as it relies on repeated deposition and patterning steps rather than complex 3D geometry.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces manufacturing time and cost while enhancing memory array reliability and maintaining high memory cell density, enabling efficient access to memory cells through the use of word line plates and dual electrodes within pillars.

Implementation Method 1

two electrodes per pillar separated by insulating dielectric material

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Data Source

PatentUS20240057348A1Pillar and word line plate architecture for a memory array
Publication Date: 2024.02.15 MICRON TECHNOLOGY INC
  • US20240057348A1 patent drawing
  • US20240057348A1 patent drawing
  • US20240057348A1 patent drawing

AI summary

Methods, systems, and devices for pillar and word line plate architecture for a memory array are described to support a memory array that may include a word line plate at each vertical level of the memory array, where the word line plate may be coupled with each memory cell of a word line tile at the respective level. The memory array includes multiple pillars, where each pillar includes two or more electrodes that run the vertical length of the pillar and which are separated by an insulating dielectric material. Each electrode of the pillar is coupled with a corresponding set of memory cells, with each memory cell located at a different level of the array. An electrode of the pillar mis addressed, along with a word line plate of the memory array, to access a memory cell associated with the electrode and word line plate.