Memory Circuit Assist Trimming for Power Reduction
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Solution Overview
Problem
Existing memory devices consume excessive active power due to always-active assist circuits, which are not selectively activated based on the need of individual bits, leading to reduced reliability in read and write operations at low power supply voltages.
Innovation Solution
A memory device with an Assist Circuit Trimming (ACT) circuit and a built-in self-test engine that identifies non-functional bits and stores their addresses in a one-time programmable memory, allowing the ACT circuit to selectively activate only necessary assist circuits, reducing overall active power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If assist circuits are always active to ensure reliable read and write operations, then reliability is improved, but active power consumption increases
Solution Approach 1:
The patent applies local quality by enabling assist circuits on a per-bit basis rather than globally. The ACT circuit examines each bit's functionality individually and activates assist circuits only for specific bits that require assistance, rather than keeping all assist circuits active throughout the memory device. This localized approach reduces overall power consumption while maintaining reliability where needed.
Solution Approach 2:
The patent implements dynamics by making the assist circuit activation state changeable based on bit functionality. The system dynamically determines which bits need assistance through examination and testing, then adjusts the activation state of assist circuits accordingly. This dynamic adaptation allows the system to optimize between reliability and power consumption based on actual operational needs.
2Use of energy by moving object
If assist circuits are selectively activated only when needed, then active power consumption is reduced, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the memory device into individual bit units, each with its own assist circuit that can be independently controlled. The ACT circuit segments the examination and activation process, evaluating each bit separately and activating assist circuits only for specific bits rather than treating the entire memory array as a single unit. This segmentation enables fine-grained power management.
Solution Approach 2:
The patent implements self-service through the built-in self-test engine that automatically examines bit functionality and generates activation signals for assist circuits without external intervention. The system performs self-diagnosis and self-adjustment, reducing the need for external control logic and simplifying the overall system architecture despite the added functionality.
3Reliability
If all bits are examined and tested to identify non-functional bits, then reliability is improved, but time consumption increases
Solution Approach 1:
The patent applies preliminary action by performing bit examination and functionality testing during manufacturing or initialization phases before the memory device enters normal operation. The ACT circuit pre-identifies non-functional bits and stores this information in non-volatile memory, so that during normal operation, the system can immediately activate assist circuits for identified bits without performing time-consuming examinations. This preliminary assessment separates the testing overhead from operational time.
Data Source
AI summary
A method includes: examining, by a test engine, whether a first bit of a memory array is functional; in response to the first bit being not functional, storing, by the test engine, address information of the first bit into a memory device; and retrieving, by an assist circuit trimming (ACT) circuit, the address information of the first bit from the memory device to selectively activate at least a first one of a plurality of assist circuits associated with the first bit.