Semiconductor Memory Bank Groups Sharing Global I/O Lines
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Solution Overview
Problem
Conventional semiconductor memory devices with multiple bank groups require a large number of global I/O lines, leading to increased area occupation due to the need for independent data input/output operations across banks, which limits efficient data transfer and storage.
Innovation Solution
Implementing a semiconductor memory device with bank groups that share data I/O global lines using data multiplexing and demultiplexing units to manage data transfer between bank groups, reducing the number of required global lines and minimizing area occupation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If each bank group has independent global I/O lines for data input/output operations, then data transfer efficiency is improved, but the number of global lines increases leading to larger area occupation
Solution Approach 1:
Multiple bank groups share common global I/O lines (GIO_L and GIOR_L) instead of each bank group having dedicated lines. The data transfer units multiplex data from multiple banks onto shared global lines, reducing the total number of global lines required while maintaining data transfer capability across all bank groups.
Solution Approach 2:
The global I/O lines serve multiple functions by being shared across different bank groups. The same set of global lines can transfer data from any bank group to the data input unit or from the data output unit to any bank group, making the I/O infrastructure universal rather than dedicated to specific banks.
2Area of stationary object
If multiple bank groups share data I/O global lines, then the number of global lines is reduced minimizing area occupation, but data transfer efficiency may be compromised
Solution Approach 1:
The data transfer units dynamically control the connection between banks and global lines based on which bank group needs data transfer. Using control signals (such as /BW_CMD and /BR_CMD), the system activates specific data transfer units to connect particular banks to the shared global lines, enabling dynamic resource allocation that maintains efficiency despite sharing.
Solution Approach 2:
Data transfer units act as intermediaries between the banks and the shared global I/O lines. These transfer units buffer and route data from multiple banks onto the shared global lines, managing the sharing mechanism to ensure that data transfer efficiency is maintained even though multiple banks compete for the same physical lines.
Data Source
AI summary
The semiconductor memory device includes a plurality of bank groups each including a plurality of banks sharing one of a plurality of global input/output line groups, a data input unit configured to transfer external data to data input global lines in response to write commands corresponding to the respective bank groups, a data output unit configured to output data applied on data output global lines to an external circuit in response to read commands corresponding to the respective bank groups, and a data transfer unit configured to transfer data applied on the data input global lines to one of the plurality of global input/output line groups in response to the write commands, and to transfer data applied on one of the plurality of global input/output line groups to the data output global lines in response to the read commands.