Semiconductor Memory Bank Redundancy Sharing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor memory devices face inefficiencies in column repair due to limited sharing of redundancy column cell lines, leading to reduced wafer yield and increased fabrication costs as the number of defective cells increases with high integration and speed advancements.
Innovation Solution
A semiconductor memory device design that allows multiple column memory cell blocks to share a redundancy column cell line, utilizing a connection selecting unit to connect normal and redundancy data input/output units to local and global data lines based on column addresses, enhancing repair efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of column memory cell blocks increases to achieve high integration, then the storage capacity increases, but the number of redundancy column cell lines per block decreases, reducing repair capability
Solution Approach 1:
The redundancy column cell line is designed to serve multiple column memory cell blocks simultaneously. Instead of dedicating redundancy lines to single blocks, the same redundancy line can be shared across multiple blocks through the connection selecting unit, which routes data lines dynamically based on which block requires repair operations.
Solution Approach 2:
Multiple column memory cell blocks are merged to share common redundancy resources. The patent combines the redundancy infrastructure across blocks, allowing a single redundancy column cell line to support repair operations for multiple blocks, thereby reducing total redundancy overhead while maintaining repair capability.
2Ease of repair
If redundancy column cell lines are dedicated to individual column memory cell blocks, then repair operations are simple, but the occupied area increases and wafer yield decreases
Solution Approach 1:
The connection selecting unit enables redundancy column cell lines to perform multiple functions by serving different column memory cell blocks as needed. This dynamic routing allows the same physical redundancy line to replace defective lines in different blocks, reducing the total number of redundancy lines required while maintaining ease of repair through controlled switching.
Solution Approach 2:
The system transitions from static, dedicated redundancy assignments to dynamic, flexible assignments. The connection selecting unit changes the connectivity configuration based on which block requires repair, allowing the redundancy infrastructure to adapt its function dynamically rather than being fixed to specific blocks.
3Speed
If more column memory cell blocks are included in one bank to increase pre-fetch bits, then memory speed improves, but the number of redundancy column cell lines per block decreases
Solution Approach 1:
The redundancy column cell lines are designed with universal applicability across multiple blocks within the bank. By making redundancy lines serve multiple blocks rather than being block-specific, the system can support higher block counts needed for increased pre-fetch bits while maintaining adequate redundancy coverage through shared resources.
Data Source
AI summary
A semiconductor memory device having a bank including a redundancy cell block and a plurality of normal cell blocks includes a plurality of normal data inputting/outputting units configured to respectively input/output data from the normal cell blocks in response to a first input/output strobe signal, a redundancy data inputting/outputting unit configured to input/output data from the redundancy cell block in response to the first input/output strobe signal, and a connection selecting unit configured to selectively connect the normal data inputting/outputting units and the redundancy data inputting/outputting unit to a plurality of local data lines in response to a address.