Semiconductor Memory Banks with Local Sense Amplifier Arrays
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Solution Overview
Problem
Highly integrated semiconductor memory devices face challenges in achieving larger data storage capacity and smaller size while maintaining high integration, as large memory cell arrays hinder operational speed and increase power consumption.
Innovation Solution
The semiconductor device incorporates multiple memory banks with local sense amplifier arrays, first and second input/output lines, and column selection signal lines to enhance data input/output capacity, allowing for increased data transfer efficiency and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the memory cell array size is increased to provide larger data storage capacity, then the storage capacity is improved, but the operational speed deteriorates and power consumption increases
Solution Approach 1:
The memory cell array is divided into multiple memory banks (first memory bank, second memory bank, etc.), each with its own local sense amplifier array. This segmentation allows parallel access to different memory banks, improving operational speed while maintaining large total storage capacity. The address decoder is also divided into multiple local address decoders, further enabling parallel operation.
Solution Approach 2:
The patent introduces a hierarchical structure with local sense amplifier arrays at the memory bank level and a global sense amplifier array at the system level. Data can be accessed through local I/O lines within each memory bank or through global I/O lines that span multiple banks, adding a dimensional aspect to data access paths and enabling faster local operations.
2Quantity of substance
If the memory cell array size is increased to provide larger data storage capacity, then the storage capacity is improved, but power consumption increases
Solution Approach 1:
The memory system is segmented into multiple independent memory banks, each with its own local sense amplifier array and local address decoder. This allows the system to activate only the specific memory bank being accessed, rather than powering up the entire memory array, thereby reducing power consumption while maintaining large total storage capacity.
Solution Approach 2:
Each memory bank is equipped with its own local sense amplifier array and local address decoder, enabling autonomous operation of individual banks. This local quality allows the system to perform operations in distributed manner, reducing the power burden on any single component and enabling more efficient power management across the entire memory system.
3Productivity
If local sense amplifier arrays are added under each memory bank to increase data input/output capacity, then the data transfer efficiency is improved, but device complexity increases
Solution Approach 1:
The sense amplifier functionality is segmented into local sense amplifier arrays distributed under each memory bank, with each local array handling I/O operations for its associated bank. This segmentation increases total data input/output capacity through parallel operations while organizing complexity into manageable, repetitive modular units rather than a single complex centralized structure.
Solution Approach 2:
Each local sense amplifier array serves multiple functions: it acts as a sense amplifier for its local memory bank, provides local I/O buffering, and can interface with both local and global I/O lines. This multi-functionality increases data input/output capacity while reducing the need for separate dedicated components, thereby managing device complexity.
Data Source
AI summary
A semiconductor device may include a plurality of memory banks arranged in a first direction; an address decoder arranged at one side of the memory banks; a plurality of local sense amplifier arrays arranged under each of the memory banks; a plurality of first input/output lines connected between the memory banks and the local sense amplifier arrays corresponding to each of the memory banks; and at least one second input/output line connected to the local sense amplifier arrays and extended in the first direction.


