Memory Device Barrier Layers Suppress Leakage Currents

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Solution Overview

Problem

In three-dimensionally disposed resistance change type memory devices, leakage currents between word lines can be significant, leading to erroneous reading and increased power consumption due to shared resistance variable films.

Innovation Solution

The memory device incorporates barrier layers with a trapezoidal cross-section, selectively formed on the end surfaces of word lines, which protrude towards local bit lines, reducing leakage currents and improving step coverage, thereby enhancing data reading accuracy and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If resistance change type memory cells are three-dimensionally disposed with shared resistance variable films, then memory device integration is improved, but leakage current between word lines increases

Engineering Contradiction:
Improvememory device integrationVSAvoidleakage current between word lines
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

An insulating film is introduced as an intermediary layer between adjacent word lines that share the same resistance variable film. This insulating film acts as a mediator to prevent direct electrical leakage between word lines while allowing the three-dimensional memory structure to function. The insulating film is positioned to extend in the first direction and is located between the word lines in the second direction, effectively blocking leakage current paths without interfering with the memory cell operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The word lines are segmented by introducing insulating films between adjacent word lines. This segmentation divides the continuous word line structure into electrically isolated segments, preventing leakage current from propagating between adjacent word lines. Each word line segment can be independently controlled, maintaining the three-dimensional memory architecture while eliminating the harmful leakage effect.

Inventive Principle:
Principle #1Segmentation

2Object-generated harmful factors

If barrier layers are selectively formed on end surfaces of word lines, then leakage current is suppressed, but device structure complexity increases

Engineering Contradiction:
Improveleakage current suppressionVSAvoiddevice structure complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

Barrier layers are selectively formed only on the end surfaces of word lines that are positioned in specific locations relative to the resistance variable film. This local quality approach applies the barrier layer treatment only where it is most needed - at the ends of word lines adjacent to the resistance variable film - rather than coating all word line surfaces uniformly. This reduces the overall amount of material deposited and simplifies the manufacturing process while still achieving effective leakage current suppression at the critical interfaces.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses leakage currents between word lines, improves data reading accuracy, and reduces power consumption by selectively forming barrier layers on the memory device's end surfaces, ensuring accurate state transitions of resistance change films.

Implementation Method 1

a resistance change film (30) provided between the plurality of first interconnects (10, 20) and the second interconnect (20). The resistance change film (30) reversibly transits between a first resistance state and a second resistance state

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS10283706B2Memory device
Publication Date: 2019.05.07 KIOXIA CORP
  • US10283706B2 patent drawing
  • US10283706B2 patent drawing
  • US10283706B2 patent drawing

AI summary

A memory device includes first interconnects extending in a first direction; a second interconnect extending in a second direction crossing the first interconnects; an insulating film provided between two first interconnects; and a resistance change film between the first interconnects and the second interconnect. The resistance change film includes a first layer and second layers, the first layer extending in the second direction along the second interconnect, and the second layers being provided selectively between the respective first interconnects and the first layer. The second layers protrude toward the second interconnect exceeding an end surface of the insulating film in a third direction from the respective first interconnects toward the second interconnect. The respective second layers have a surface on a side of the first interconnects, and a width in the second direction of the surface is wider than a width in the second direction of the first interconnect.