Memory Bit Correction Beyond ECC Limits Using Multiple Read Voltages
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Solution Overview
Problem
Current error correction codes (ECC) in memory storage devices are limited in their ability to correct errors beyond their correction capacity, leading to uncorrectable data errors.
Innovation Solution
The system employs multiple read voltages to identify and correct errors by comparing bit values obtained at different voltages, flipping bits to generate corrected values, and iteratively applying ECC procedures until successful correction is achieved.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC procedure is applied to correct errors in data, then data integrity is improved, but the correction capacity is limited to a specific number of errors
Solution Approach 1:
The patent changes the reading parameter (voltage level) to obtain different data representations. By reading the same storage element at multiple different voltage levels, the system obtains multiple bit values that can be used to resolve errors beyond the original ECC correction capacity, effectively expanding the adaptability while maintaining data integrity
2Reliability
If multiple read voltages are used to correct errors, then correction capacity is exceeded, but device complexity increases
Solution Approach 1:
The system performs preliminary reading of the storage element at multiple different voltage levels before the ECC correction process. This preliminary action captures multiple potential bit values in advance, allowing the ECC procedure to select the correct value without requiring complex real-time voltage adjustment or multiple iterative reading operations during correction
Solution Approach 2:
The reading process is segmented into multiple independent reads at different voltage levels. Each read operation is simple and independent, obtaining a bit value at a specific voltage threshold. The complexity is managed by segmenting the correction process into: (1) multiple simple reads at different voltages, (2) comparison of bit values, and (3) ECC correction, rather than requiring a single complex correction operation
Data Source
AI summary
A data storage device includes a memory including a plurality of storage elements. The memory is configured to read a group of the storage elements using a first read voltage to obtain a first plurality of bit values. A controller is coupled to the memory. The controller is configured to initiate a first error correction code (ECC) procedure on the first plurality of bit values. In response to the first ECC procedure determining that the first plurality of bit values is not correctable, the controller is further configured to instruct the memory to read the group of the storage elements using a second read voltage to obtain a second plurality of bit values, and to change one or more values of the first plurality of bit values to corresponding values of the second plurality of bit values to generate a first plurality of corrected bit values.