Semiconductor Memory Device Bit Line Segmentation
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Solution Overview
Problem
Current semiconductor memory devices face challenges in reducing power consumption during writing operations due to inefficiencies in bit line management and data distribution across memory cells.
Innovation Solution
The semiconductor memory device employs a method where some bit lines are kept in an electrically floating state during programming, reducing the number of bit lines contributing to data writing and minimizing potential differences, thereby lowering power consumption and increasing writing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If all bit lines are actively driven during programming operations, then data writing coverage is maximized, but power consumption increases due to charging currents and potential differences
Solution Approach 1:
The patent divides the bit line array into multiple groups, where only a subset of bit lines is actively driven during each programming operation. This segmentation allows the system to maintain data writing coverage across all memory cells while reducing the number of simultaneously active bit lines, thereby lowering power consumption associated with charging currents and potential differences.
Solution Approach 2:
The patent dynamically selects and activates only the necessary bit lines for each programming operation based on the data distribution requirements. This dynamic approach ensures that all memory cells can be programmed over multiple operations while minimizing the number of active bit lines at any given time, thus reducing power consumption without sacrificing overall data writing coverage.
2Speed
If multiple bit lines are simultaneously driven for parallel data writing, then writing speed increases, but power consumption increases due to increased charging currents
Solution Approach 1:
The patent applies partial action by driving only a subset of bit lines simultaneously during programming operations rather than all bit lines. This approach achieves sufficient writing speed by targeting specific memory cell regions while reducing the total charging current required, thereby lowering power consumption compared to driving all bit lines in parallel.
3Measurement precision
If verification operations are performed on all bit lines in every loop, then data accuracy is maximized, but power consumption increases
Solution Approach 1:
The patent segments the verification process by performing verification operations only on the subset of bit lines that were actively driven during programming, rather than verifying all bit lines in every loop. This segmentation maintains data accuracy for the programmed cells while reducing power consumption by avoiding unnecessary verification of cells that were not programmed in the current loop.
Solution Approach 2:
The patent implements a self-service verification approach where the system intelligently determines which bit lines require verification based on the programming operation results. This self-service mechanism ensures that verification is performed only where necessary, maintaining data accuracy while minimizing power consumption associated with unnecessary verification operations.
Data Source
AI summary
A semiconductor memory device includes first and second memory cells, each of which includes a charge storage layer, a first bit line that is connected to the first memory cell, and a second bit line that is connected to the second memory cell. A writing operation includes multiple loops of a programming operation and a verification operation, and first data is written in the first memory cell, and second data different from the first data is written in the second memory cell through the writing operation. In a first loop of the writing operation, a first voltage is applied to the first bit line and the second bit line is maintained in an electrically floating state during the programming operation, and a verification operation relating to the second data is not performed and a verification operation relating to the first data is performed.