Nonvolatile Memory Bit Line Voltage Control for Retention
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Solution Overview
Problem
The narrow threshold voltage distribution in multi-level cells (MLCs) of semiconductor memory devices leads to deteriorated retention characteristics, making it difficult to differentiate between erase and program states, thereby lowering the reliability of read and erase operations.
Innovation Solution
A semiconductor memory device is configured with a control circuit that sets bit line voltages differently for program verifying, read, and erase verifying operations, precharging bit lines to specific voltages to improve retention characteristics by adjusting threshold voltages during these operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level cells (MLCs) are used to increase storage density, then storage capacity is improved, but retention characteristics deteriorate due to narrow threshold voltage distribution
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting bit line voltages based on operation type. During program verifying operations, higher bit line voltages are applied to compensate for threshold voltage shifts, while lower voltages are used during erase verifying operations. This voltage parameter adjustment resolves the contradiction by maintaining reliable state differentiation despite the narrow threshold voltage distribution inherent in MLCs.
2Ease of operation
If read or program operations are performed, then data access is enabled, but threshold voltage shifts occur causing retention characteristics to deteriorate
Solution Approach 1:
The patent implements preliminary anti-action by applying compensatory voltage adjustments before and during read/write operations. The control circuit predicts threshold voltage shifts and pre-adjusts bit line voltages to counteract upcoming disturbances. This prevents retention deterioration before it occurs, allowing data access operations to proceed without compromising long-term reliability.
Solution Approach 2:
The control circuit incorporates feedback mechanisms that monitor threshold voltage distributions and adjust subsequent operation parameters accordingly. By continuously adapting bit line voltages based on observed threshold voltage shifts, the system maintains reliable state differentiation while enabling continuous data access operations.
3Reliability
If higher bit line voltage is used in program verifying operation, then program state differentiation is improved, but energy consumption increases
Solution Approach 1:
The patent applies dynamics by making bit line voltages variable rather than fixed. The control circuit dynamically selects voltage levels based on the specific operation phase and memory state. During program verifying operations, higher voltages are temporarily applied only when necessary for state differentiation, then reduced to lower energy consumption levels during subsequent operations. This dynamic voltage adjustment resolves the contradiction between reliable state differentiation and energy efficiency.
Data Source
AI summary
A semiconductor memory device includes a memory cell array configured to store data; peripheral circuits configured to perform program verifying operation, read operation, and erase verifying operation on the memory cell array; and a control circuit configured to control the peripheral circuits, wherein the control circuit is configured to control the peripheral circuits to set a bit line voltage in the program verifying operation to have a higher level than a bit line voltage in the read operation, and a bit line voltage in the erase verifying operation to have a lower level than the bit line voltage in the read operation.