Nonvolatile Memory Bit Line Voltage Control for Single-Step Programming
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Solution Overview
Problem
Multi-level cell (MLC) nonvolatile memory devices require separate least significant bit (LSB) and most significant bit (MSB) program operations, increasing the time for program operations as the number of bits stored increases, which is inefficient.
Innovation Solution
A nonvolatile memory device and method that control the voltage level of a bit line using a potential control unit to perform a program operation for MLCs without the need for separate LSB and MSB operations, by precharging and discharging the bit line based on program data values, allowing a single program operation to complete the data programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If separate LSB and MSB program operations are performed for MLC, then data storage capacity is increased, but program operation time is increased
Solution Approach 1:
The patent merges the separate LSB and MSB program operations into a single unified program operation. By controlling the bit line voltage to different levels according to the program data values (0V, Vcc/2, or Vcc), the system can program multiple bits simultaneously in one operation cycle, eliminating the need for sequential LSB and MSB operations while maintaining full data storage capacity.
Solution Approach 2:
The patent changes the voltage parameter of the bit line dynamically based on the program data. Instead of using fixed voltage levels for different programming stages, the system adjusts the bit line voltage to three distinct levels (0V, Vcc/2, Vcc) corresponding to different data values, enabling single-operation programming of multiple bits by varying this key electrical parameter.
2Productivity
If bit line voltage is controlled to multiple levels, then single operation programming is enabled, but control circuit complexity is increased
Solution Approach 1:
The patent applies preliminary action by precharging the bit line to a specific voltage level before the program operation begins. This precharge step prepares the bit line in advance, and then during the actual program operation, the voltage is adjusted to the appropriate level (0V, Vcc/2, or Vcc) based on the data to be programmed. This preliminary preparation simplifies the overall control logic by separating the voltage setup from the programming action.
Data Source
AI summary
A nonvolatile memory device includes a memory cell array including a number of memory cells coupled to a selected bit line, a bit line selection unit configured to select and precharge the selected bit line, and a potential control unit configured to control a voltage level of the precharged bit line in response to a voltage level corresponding to a value of program data.