3D Memory Device Bit Line Voltage Control for Threshold Distribution

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Solution Overview

Problem

Three-dimensional memory devices face challenges in maintaining operation reliability due to widened threshold voltage distribution, which affects programming efficiency and data storage accuracy.

Innovation Solution

The method involves setting bit line voltages differently based on the separation distances of channel structures from the edge of the selected word line during programming operations, using a pre-program loop and a main program loop with varying voltages to narrow the threshold voltage distribution range.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If three-dimensional memory device structure is used to increase storage capacity, then storage capacity is improved, but threshold voltage distribution widens affecting operation reliability

Engineering Contradiction:
Improvestorage capacityVSAvoidoperation reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by differentiating bit line voltages based on the spatial position of channel structures. Memory cells are divided into first and second groups according to their separation distances from word line edges, with each group receiving customized bit line voltages during programming. This localized approach compensates for position-dependent threshold voltage variations, thereby narrowing the overall threshold voltage distribution and improving operation reliability while maintaining high storage capacity

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the bit line voltage parameter dynamically based on the separation distance of channel structures from word line edges. By adjusting voltage levels according to spatial position, the method compensates for manufacturing variations and physical effects that cause threshold voltage spreading, thus maintaining reliable operation in three-dimensional memory structures

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If uniform bit line voltages are applied to all channel structures, then device complexity is reduced, but programming efficiency varies due to different separation distances

Engineering Contradiction:
Improvevoltage control complexityVSAvoidprogramming efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent implements local quality by categorizing memory cells into different groups based on their geometric characteristics (separation distance from word line edges). Each group receives tailored bit line voltages optimized for its specific physical conditions, ensuring consistent programming efficiency across the array without requiring complex individualized control for each cell

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If bit line voltages are differentiated based on separation distances, then threshold voltage distribution is narrowed, but device complexity increases

Engineering Contradiction:
Improvethreshold voltage distribution controlVSAvoidvoltage control complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent manages the complexity-threshold voltage control trade-off by implementing a hierarchical classification system. Memory cells are grouped into a limited number of categories (first and second groups) based on their separation distances, with each group receiving specific voltage levels. This approach achieves precise threshold voltage distribution control while maintaining manageable device complexity through systematic categorization rather than individualized control

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies segmentation by dividing the memory cell array into distinct groups based on their spatial characteristics. This segmentation allows for simplified voltage control schemes where each segment receives optimized voltages, achieving precise threshold voltage control without requiring complex universal control mechanisms

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10825527B2Memory device and operating method of the memory device
Publication Date: 2020.11.03 SK HYNIX INC
  • US10825527B2 patent drawing
  • US10825527B2 patent drawing
  • US10825527B2 patent drawing

AI summary

There are provided a memory device and an operating method thereof. While memory cells connected to a selected word line are being programmed, the memory device applies bit line voltages set to be different from each other depending on separation distances of channel structures from an edge of the selected word line to bit lines connected to the channel structures.