Semiconductor Memory Device Bit Line Precharge Optimization

Solution Overview

Problem

Current semiconductor memory devices face inefficiencies in read operations due to differences in precharge voltages applied to even and odd bit lines, which slow down the precharge speed and increase current consumption.

Innovation Solution

The semiconductor memory device employs a configuration where both even and odd bit lines are precharged with the same voltage during read operations, enhancing precharge speed and reducing current consumption by maintaining odd cell strings as data non-storage regions with programmed dummy data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If different precharge voltages are applied to even and odd bit lines, then data storage capacity is maintained, but precharge speed decreases and current consumption increases

Engineering Contradiction:

Improvedata storage capacityVSAvoidprecharge speed

Core Design Contradiction:

Quantity of substanceVSSpeed

Solution Approach 1:

The memory device is divided into first cell strings (even bit lines) and second cell strings (odd bit lines). The second cell strings are maintained as data non-storage regions with programmed dummy data, while first cell strings store actual data. This segmentation allows different operational modes for even and odd bit lines, enabling optimized precharge voltages for each type to improve overall precharge speed without compromising data storage capacity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different operational characteristics are applied to different regions of the memory device. First cell strings operate as active data storage regions with specific precharge voltages, while second cell strings operate as programmed dummy data regions with different precharge voltages. This local differentiation allows each region to be optimized for its specific function, improving overall system performance.

Inventive Principle:

Principle #3Local quality

2Quantity of substance

If different precharge voltages are applied to even and odd bit lines, then data storage capacity is maintained, but current consumption increases

Engineering Contradiction:

Improvedata storage capacityVSAvoidcurrent consumption

Core Design Contradiction:

Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

The memory device is divided into first cell strings (even bit lines) and second cell strings (odd bit lines). The second cell strings are maintained as data non-storage regions with programmed dummy data, while first cell strings store actual data. This segmentation allows different operational modes for even and odd bit lines, enabling optimized precharge voltages for each type to improve overall precharge speed without compromising data storage capacity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different operational characteristics are applied to different regions of the memory device. First cell strings operate as active data storage regions with specific precharge voltages, while second cell strings operate as programmed dummy data regions with different precharge voltages. This local differentiation allows each region to be optimized for its specific function, improving overall system performance.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS9030878B2Semiconductor memory device including a plurality of cell strings, memory system including the same, and control method thereof

Publication Date: 2015.05.12 SK HYNIX INC

AI summary

A semiconductor memory device includes first cell strings connected to first bit lines and second cell strings connected to second bit lines corresponding to the first bit lines, respectively. Data is stored in memory cells of the first cell strings, and the second cell strings are configured as a data non-storage region. At least one memory cell of each of the second cell strings is in a programmed state.