Memory Device Blind Program Voltage Control

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Solution Overview

Problem

Non-volatile memory devices operate at slower speeds compared to volatile memory devices, which can impact the reliability and efficiency of program operations, particularly in three-dimensional semiconductor structures where integration limits and data retention requirements are critical.

Innovation Solution

A memory device and operating method that include a memory block, peripheral circuits, and control logic, where a program voltage is applied to a selected word line during a blind program period without a verify operation, and a second pass voltage lower than a default first pass voltage is applied to unselected word lines, optimizing the program operation by reducing stress on memory cells and improving reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a default first pass voltage is applied to unselected word lines during a blind program period, then the program operation can be performed, but stress is applied to memory cells which reduces reliability

Engineering Contradiction:
Improveprogram operation reliabilityVSAvoidstress on memory cells
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies a second pass voltage that is lower than the default first pass voltage to unselected word lines during the blind program period. This parameter change reduces the stress on memory cells while still enabling the program operation to proceed, thereby improving reliability without compromising the programming function.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If a three-dimensional structure is used to overcome integration limits, then storage capacity increases, but program operation speed decreases

Engineering Contradiction:
Improvestorage capacityVSAvoidprogram operation speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The patent performs a blind program period where the program voltage is applied to the selected word line without performing a verify operation. This preliminary action allows the program operation to proceed more quickly in three-dimensional memory structures, overcoming the speed limitation while maintaining the high storage capacity provided by the vertical stacking architecture.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10586603B2Memory device and operating method thereof
Publication Date: 2020.03.10 SK HYNIX INC
  • US10586603B2 patent drawing
  • US10586603B2 patent drawing
  • US10586603B2 patent drawing

AI summary

There are provided a memory device and an operating method thereof. A memory device may include a memory block, peripheral circuits, and a control logic. The memory block may include a plurality of memory cells. The peripheral circuits may perform a program operation on the memory cells. The control logic may control the peripheral circuits to apply, during the program operation, a program voltage to a selected word line and selectively apply, to one or more unselected word lines, a second pass voltage lower than a first pass voltage set as a default voltage during a blind program period which does not include a verify operation.