Memory Block Allocation Across Decks to Avoid High RBER Wordlines

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Solution Overview

Problem

Memory devices face challenges due to varying read window budgets (RWB) and high read error rates (RBER) among wordlines, leading to data degradation, increased latency, and system performance issues, particularly when programming operations are performed on wordlines with high RBER clusterings.

Innovation Solution

A memory sub-system controller allocates blocks across different decks within a memory device to avoid high RBER clusterings by identifying predefined usage types for each die, ensuring programming operations are performed on wordlines with lower RBERs, thereby reducing the need for additional ECC decoding and minimizing host timeouts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If programming operations are performed on wordlines with high RBERs, then memory capacity is utilized, but data reliability deteriorates and host timeouts increase

Engineering Contradiction:
Improvememory capacity utilizationVSAvoiddata reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by differentiating between different regions (decks) of the memory device based on their RBER characteristics. The controller identifies which deck has lower RBER and directs programming operations to that specific region, making the memory system non-uniform in its operational characteristics to optimize reliability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The memory device is segmented into multiple decks, and the controller selectively operates on specific decks based on their error rate characteristics. This segmentation allows the system to isolate and avoid high-RBER regions while utilizing low-RBER regions for programming operations.

Inventive Principle:
Principle #1Segmentation

2Productivity

If programming operations are performed on wordlines with high RBERs, then memory operations continue, but latency increases due to additional ECC decoding

Engineering Contradiction:
Improvememory operation continuityVSAvoidlatency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The controller performs preliminary actions by identifying and characterizing the RBER of different decks before performing programming operations. This advance characterization allows the system to pre-determine which deck is suitable for programming, avoiding the need for time-consuming ECC decoding during actual programming operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system skips over high-RBER decks and directly routes programming operations to low-RBER decks, avoiding the time-consuming ECC decoding process that would otherwise be required to handle errors from high-RBER regions.

Inventive Principle:
Principle #21Skipping (Rushing through)

3Device complexity

If blocks are allocated without considering RBER clusterings, then allocation simplicity is maintained, but system performance deteriorates

Engineering Contradiction:
Improveblock allocation complexityVSAvoidsystem performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The controller performs preliminary characterization of deck RBER characteristics during initialization or idle periods. This advance preparation creates a mapping or table of suitable decks for programming, allowing simple lookup-based allocation decisions during actual operations without complex real-time analysis.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary layer (the controller's deck selection logic) that sits between the block allocation request and the physical memory operations. This intermediary translates simple allocation requests into informed decisions about which deck to use, maintaining simplicity at the interface while optimizing performance internally.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12614593B2Managing allocation of blocks in a memory sub-system
Publication Date: 2026.04.28 MICRON TECHNOLOGY INC
  • US12614593B2 patent drawing
  • US12614593B2 patent drawing
  • US12614593B2 patent drawing

AI summary

A processing device, operatively coupled with a memory device, receives a request to perform a programming operation on a first set of a block addressable by a first wordline of a first die of the memory device, wherein the first die comprises a plurality of decks of the memory device. The processing device identifies, based on a predefined usage type associated with the first die, a deck of the plurality of decks for performing the programming operation; and performing the programming operation on a second set of cells of the block addressable by the first wordline residing on the identified deck of the first die.