Nonvolatile Memory Block Refresh Using Cross-Page Error Monitoring

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Solution Overview

Problem

Existing nonvolatile memory systems face challenges in efficiently managing and correcting errors in data storage, particularly when the number of errors in a block exceeds the error correction capability, leading to data degradation and potential loss during repeated read operations.

Innovation Solution

A nonvolatile memory apparatus and control method that monitor error bits in pages other than the read page, and when errors exceed a threshold, the data is rewritten to another block, effectively managing error correction and preventing data loss by shifting data to a fresh block before errors exceed the correction capability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction is performed by rewriting data when errors exceed threshold, then data integrity is improved, but processing time increases due to additional read operations on other pages

Engineering Contradiction:
Improvedata integrityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary error detection by reading other pages in the same block when a read request occurs. This advance detection allows the system to identify blocks with excessive errors before they affect data integrity, enabling proactive refresh operations rather than reactive corrections, thus reducing overall processing time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory system performs self-diagnosis by automatically detecting error conditions in other pages during normal read operations. The controller monitors error bits without external intervention and autonomously decides when to perform refresh operations, eliminating the need for separate error checking procedures and reducing processing overhead.

Inventive Principle:
Principle #25Self-service

2Reliability

If all pages in a block are monitored for errors, then data integrity is improved, but device complexity increases due to additional monitoring mechanisms

Engineering Contradiction:
Improvedata integrityVSAvoidmonitoring complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The read operation serves dual purposes: it fulfills the external read request while simultaneously performing error monitoring on other pages in the same block. This multi-functionality eliminates the need for separate dedicated monitoring circuits or procedures, reducing device complexity while maintaining comprehensive error detection capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory system uses its own read operation to perform error monitoring, rather than requiring separate monitoring mechanisms. The controller leverages the existing read infrastructure to gather error information from other pages, making the monitoring function self-contained and avoiding additional complexity.

Inventive Principle:
Principle #25Self-service

3Reliability

If refresh is performed by rewriting entire blocks, then data integrity is improved, but productivity decreases due to increased write operations

Engineering Contradiction:
Improvedata integrityVSAvoidwrite efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs refresh operations at the block level rather than page level, but only for blocks that are detected to have excessive errors. This localized approach ensures that refresh operations are concentrated where needed, maintaining data integrity in affected blocks while avoiding unnecessary write operations on healthy blocks, thus preserving overall write efficiency.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system changes the refresh strategy based on error conditions: when error bits in other pages exceed the threshold, the system triggers a block rewrite operation. This parameter-based decision-making allows the system to adapt refresh frequency to actual data quality, performing writes only when necessary to correct errors, thereby maintaining productivity while ensuring integrity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9804921B2Nonvolatile memory apparatus and control method of nonvolatile memory apparatus
Publication Date: 2017.10.31 PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
  • US9804921B2 patent drawing
  • US9804921B2 patent drawing
  • US9804921B2 patent drawing

AI summary

A nonvolatile memory apparatus is provided with a nonvolatile memory including a plurality of blocks each being a recording area of the data and a unit of erasing of the data, and a controller for controlling writing or reading of the data to/from the nonvolatile memory. Each of the blocks includes pages each being a unit of reading of the data. The controller, when data of a first page is read in response to the data read request from the external apparatus, reads data of an other page other than the first page in a block from which the data is read, and calculates a number of errors of the data in the other page, and rewrites the data into an other block when the block from which the data is read satisfies a predetermined condition on the error based on the calculated number of errors.