Non-volatile Memory Block Gating Signal Stabilization
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Solution Overview
Problem
Conventional non-volatile semiconductor memory devices face challenges in maintaining stable voltage levels for programming operations, leading to unstable block gating signals and increased current consumption due to frequent discharging to ground voltage during programming and verify read operations.
Innovation Solution
A method and device that utilize a boosted voltage generation unit to continuously maintain a stable block gating signal during programming and verify read operations, ensuring consistent voltage levels for both primary and secondary programming processes, eliminating the need for voltage discharge at the start of each operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the block gating signal voltage level is adjusted in accordance with a conventional boosting method, then the programming operation can be performed, but the voltage level becomes unstable and difficult to control
Solution Approach 1:
The patent applies preliminary action by pre-charging the block gating signal to a first voltage level before the programming operation begins. This pre-charging ensures that the transmission transistors are already in a conductive state, eliminating voltage instability during the actual programming operation. The voltage is prepared in advance rather than being adjusted dynamically during operation.
Solution Approach 2:
The patent maintains continuous useful action by keeping the block gating signal at a stable voltage level throughout the entire programming and verify read operations. The transmission transistors remain continuously conductive during these operations, avoiding repeated charging and discharging cycles that cause voltage fluctuations and instability.
2Reliability
If the block gating signal is discharged to ground voltage at the start of each programming and verify read operation, then the voltage level can be reset, but unnecessary current is consumed and programming time increases
Solution Approach 1:
The block gating signal is pre-charged to the appropriate voltage level before the programming operation begins. This preliminary charging eliminates the need for repeated discharging and recharging cycles during subsequent programming and verify read operations, thereby reducing both current consumption and operation time.
Solution Approach 2:
The patent eliminates unnecessary discharging actions by maintaining continuous voltage levels on the block gating signal throughout programming and verify read operations. The transmission transistors remain continuously conductive, avoiding interruptions and repeated voltage adjustments that waste time and energy.
3Reliability
If the block gating signal is discharged to ground voltage at the start of each operation, then voltage levels can be reset, but current consumption increases
Solution Approach 1:
The block gating signal is charged to the required voltage level in advance before programming operations begin. This preliminary action ensures that the transmission transistors are already conductive, eliminating the need for repeated charging cycles during programming and verify read operations, thereby significantly reducing current consumption.
Solution Approach 2:
The patent maintains continuous voltage levels on the block gating signal throughout programming and verify read operations, avoiding repeated discharging and recharging cycles. This continuous operation eliminates unnecessary current consumption associated with frequent voltage adjustments while maintaining reliable voltage control.
Data Source
AI summary
In one aspect, a programming method is provided for a non-volatile semiconductor memory device which includes a plurality of electrically programmable and erasable memory cells, and transmission transistors for providing predetermined voltages to the memory cells. The method includes a primary programming process which includes providing a first program voltage to a selected memory cell to program the selected memory cell, a verify read process which includes reading the selected memory cell to verify a programmed status of the selected memory cell resulting from the primary programming process, and a secondary programming process which includes providing a second program voltage to the selected memory cell so as to reprogram the selected memory cell after the verify read process. During the verify read process, the transmission transistors are continuously gated by a boosted voltage generated during the primary programming process. The boosted voltage has a voltage level which is sufficient to provide the first and second program voltages to the memory cell.


