3D Memory Block Insulation Bridges for Structural Stability

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Solution Overview

Problem

Conventional two-dimensional semiconductor memory devices face integration limitations due to the need for expensive equipment to form fine patterns, restricting their integration density, while three-dimensional devices increase aspect ratios, posing structural challenges.

Innovation Solution

A semiconductor memory device with multiple memory blocks and insulation bridges formed between adjacent blocks, using a method that alternately stacks insulation and conductive layers, forms slits to divide the structure, and selectively removes conductive layers to create insulation bridges for support, maintaining structural integrity without electrical interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If two-dimensional planar semiconductor memory device structure is used, then manufacturing process is simpler, but integration density is limited

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidintegration density
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent transitions from a two-dimensional planar structure to a three-dimensional stacked structure by vertically stacking multiple memory cell layers. This dimensional change allows memory cells to be arranged in three dimensions rather than confined to a single plane, dramatically increasing the number of memory cells that can be packed into the same footprint area and thereby solving the integration density limitation while keeping the manufacturing process relatively straightforward

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If three-dimensional stacked structure is used to increase integration density, then integration density is improved, but aspect ratio increases causing structural instability

Engineering Contradiction:
Improveintegration densityVSAvoidstructural stability
Core Design Contradiction:
Quantity of substanceVSStability of the object's composition

Solution Approach 1:

The patent divides the continuous stacked structure into discrete memory blocks separated by insulation bridges. These insulation bridges act as segmentation elements that break up the long continuous structure into smaller segments, reducing the overall aspect ratio of each individual memory block and improving structural stability while preserving the high integration density benefits of the stacked architecture

Inventive Principle:
Principle #1Segmentation

3Quantity of substance

If three-dimensional stacked structure is used to increase integration density, then integration density is improved, but expensive equipment is required

Engineering Contradiction:
Improveintegration densityVSAvoidequipment cost
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent achieves high integration density through vertical stacking using standard planar fabrication processes extended to multiple layers, avoiding the need for expensive three-dimensional lithography equipment. The stacked structure is formed by repeating conventional deposition and etching processes in the vertical direction, thereby attaining high density without requiring costly advanced manufacturing equipment

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12628346B2Semiconductor memory device including a plurality of memory blocks and method of manufacturing the same
Publication Date: 2026.05.12 SK HYNIX INC
  • US12628346B2 patent drawing
  • US12628346B2 patent drawing
  • US12628346B2 patent drawing

AI summary

A semiconductor memory device may include a plurality of memory blocks and at least one insulation bridge. The plurality of the memory blocks may be defined by a plurality of slits parallel to each other. The at least one insulation bridge may be formed in at least one slit located on at least one side of a memory block of the plurality of memory blocks to support the adjacent memory blocks.