Nonvolatile Memory Block Testing via Page Buffer Fail Status Accumulation
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Solution Overview
Problem
The existing methods for testing nonvolatile memory devices, such as NAND flash memory, are time-consuming due to the need to perform program and scan operations on a page basis, leading to inefficiencies in identifying and repairing faulty memory cells.
Innovation Solution
A method that involves setting test bits to enable programming across entire memory blocks, storing fail status bits in page buffers, and outputting data only after completing the test program and verification across all pages, thereby reducing the need for frequent page buffer resets and improving test efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If program and scan operations are performed on a page basis, then testing coverage is improved, but test time increases
Solution Approach 1:
The patent segments the testing process into two distinct phases: a program phase where test data is written to entire memory blocks without interruption, and a scan phase where verification is performed. This segmentation allows the program operation to proceed continuously across all pages without repeated interruptions for scanning, thereby reducing total test time while maintaining comprehensive coverage through the subsequent scan phase.
Solution Approach 2:
The patent performs preliminary programming of test data to entire memory blocks before performing verification scans. By pre-programming all pages with test patterns in advance, the system eliminates the need for repeated program-scan cycles, achieving both complete testing coverage and reduced test time through this preliminary action approach.
2Manufacturing precision
If page buffer is reset after each page program, then data accuracy is improved, but test efficiency decreases
Solution Approach 1:
The patent maintains continuous programming action across all pages by preventing page buffer resets during the program phase. Test data is continuously written to successive pages without interruption, maximizing programming throughput. The page buffer is only reset after the entire memory block programming is complete, thereby maintaining data accuracy through controlled resetting while maximizing test efficiency through continuous operation.
Solution Approach 2:
The patent implements periodic resetting of the page buffer at specific intervals - specifically after completing programming of entire memory blocks rather than after each individual page. This periodic action maintains data accuracy by ensuring fresh buffer states at appropriate boundaries while avoiding unnecessary resets that would reduce test efficiency during continuous programming operations.
Data Source
AI summary
A method includes performing test bit setting; programming a first page using data set by the test bit setting, and storing a fail status bit in a page buffer, which is connected to a first bit line having a fail status, based on a verification result of the test program; performing a test program and verification on a second page based on a test program and fail status bit storage result of a preceding page, and storing a fail status bit in the page buffer, which is connected to a second bit line having a fail status, based on a verification result of the test program and verification; and after a test program, verification, and fail status bit setting with respect to the entire pages of a memory block are completed, outputting data of the page buffer.