Non-Volatile Memory Buffer Circuit for In-Place Data Comparison

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Solution Overview

Problem

Conventional non-volatile memory devices require a comparison circuit and data register for writing mechanisms, consuming significant circuit area and increasing costs.

Innovation Solution

A non-volatile memory device incorporating a sense amplifier, RAM, and a buffer circuit that generates detection results, eliminating the need for a comparison circuit and data register by performing detection and writing functions within the buffer circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a comparison circuit and data register are provided in the conventional framework, then the writing mechanism can perform data comparison and storage functions, but the circuit area increases and circuit cost increases

Engineering Contradiction:
Improvecircuit areaVSAvoidwriting mechanism functionality
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The buffer circuit merges multiple functions (data buffering, comparison, and control) into a single circuit component. The buffer circuit receives target data, compares it with readout data from the memory cell array, generates detection results, and controls the writing operation all within one integrated unit, eliminating the need for separate comparison circuits and data registers.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The buffer circuit is designed as a multi-functional component that performs diverse operations: it buffers incoming data, compares data values, generates control signals based on comparison results, and manages the writing process. This universal design allows one circuit to replace multiple specialized circuits, reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If a comparison circuit and data register are provided, then data verification can be performed during writing operations, but hardware requirements increase and circuit cost increases

Engineering Contradiction:
Improvedata verification capabilityVSAvoidhardware requirements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The buffer circuit combines data verification functionality with the buffering operation. While naturally buffering data for writing operations, the circuit simultaneously performs comparison between target data and readout data, generating detection results that verify data integrity without requiring separate verification hardware.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The buffer circuit performs self-verification by comparing its own buffered data with target data during the writing process. This self-service capability allows the circuit to verify data correctness autonomously without external verification circuits, maintaining reliability while reducing hardware requirements.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11574689B2Non-volatile memory device with comparison capability between target and readout data
Publication Date: 2023.02.07 WINBOND ELECTRONICS CORP
  • US11574689B2 patent drawing
  • US11574689B2 patent drawing
  • US11574689B2 patent drawing

AI summary

A non-volatile memory device, including a non-volatile memory cell array, a sense amplifier, a random access memory (RAM), and a buffer circuit, is provided. The sense amplifier is configured to generate readout data. The RAM is configured to store write-in data. The buffer circuit generates a detection result according to target data and the readout data, and writes the detection result to the RAM.