Semiconductor Memory Buffer Pages Reduce Peripheral Circuit Area
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Solution Overview
Problem
Current semiconductor memory devices face challenges in reducing the size of peripheral circuits while maintaining efficient program operations, particularly in handling multiple-level cell programming across buffer and normal pages.
Innovation Solution
The semiconductor memory device incorporates a peripheral circuit that performs single-level cell programming on buffer pages and multiple-level programming on normal pages, allowing data from buffer pages to be used for programming operations without the need for additional latch groups in the read and write circuit, thereby reducing the circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate latch groups are added to the read and write circuit for handling single and multi-level cell data, then the program operation capability is improved, but the circuit area increases
Solution Approach 1:
The buffer page structure is designed to serve multiple functions: it acts as both a temporary storage for incoming page data and as a source for multi-level cell programming operations. By programming buffer pages with SLC mode and then using this programmed data for MLC/TLC operations on normal pages, the buffer page group becomes a multi-functional component that eliminates the need for separate latch groups.
Solution Approach 2:
The invention merges the functions of separate latch groups into the buffer page structure. Instead of having dedicated latch circuits for holding single-level and multi-level cell data, the buffer pages themselves store the programmed data that is directly used for subsequent multi-level programming operations, combining storage and data preparation functions into a single structure.
2Area of stationary object
If the peripheral circuit is simplified to reduce size, then the circuit area is reduced, but the efficiency of handling multiple-level cell programming may deteriorate
Solution Approach 1:
The buffer page group is used to preliminarily program and prepare data in SLC mode before the actual multi-level cell programming on normal pages. This preliminary action of programming buffer pages with first and second page data creates ready-to-use programmed data that can be directly applied to normal pages, maintaining efficient multi-level programming without requiring complex peripheral circuits.
Solution Approach 2:
The buffer page group acts as an intermediary between the peripheral circuit and the normal pages for multi-level cell programming. Instead of the peripheral circuit directly managing complex multi-level programming operations, it first programs the buffer pages, and then these programmed buffer pages serve as the data source for programming normal pages, simplifying the peripheral circuit's role while maintaining efficiency.
Data Source
AI summary
A semiconductor memory device includes a memory block and a peripheral circuit. The memory block includes normal pages and buffer pages. Each of the normal pages includes memory cells that store the N bits of data. Each of the buffer pages includes memory cells that store one bit of data. The peripheral circuit receives a first page data and performs a single level cell (SLC) program on the first page data in a first buffer page. In addition, the peripheral circuit receives a second page data and performs the SLC program on the second page data in a second buffer page. In addition, the peripheral circuit performs a multiple-level program operation on a normal page based on the first and second page data programmed in the first and second buffer page, respectively.