Memory Data Bus Coupling for Die-Area-Efficient In-Memory Processing

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Solution Overview

Problem

Previous approaches to coupling processing units (PUs) to both input and output data buses in memory devices are costly and inefficient in terms of die area usage, limiting the flexibility and increasing implementation costs.

Innovation Solution

Configuring the PU to receive data from and provide data to only one of the input or output data bus, reducing the die area required and lowering implementation costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the PU is coupled to both input data bus and output data bus to receive and provide data, then the flexibility of data processing is improved, but the die area and implementation costs increase

Engineering Contradiction:
Improveflexibility of data processingVSAvoiddie area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent applies multi-functionality by enabling the processing unit to operate in multiple modes: it can receive data from either the input data bus or the output data bus, and provide processed data to either bus. This universal coupling approach allows the same hardware structure to serve different functional requirements without increasing die area, as the PU dynamically selects its data sources and destinations based on operational needs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If the PU is coupled to both input data bus and output data bus, then the flexibility of data processing is improved, but the implementation costs increase

Engineering Contradiction:
Improveflexibility of data processingVSAvoidimplementation costs
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The processing unit is designed with universal interfaces that can connect to both input and output data buses, allowing it to perform multiple functions (receiving from either bus, providing to either bus) without requiring separate dedicated circuits. This reduces implementation costs by eliminating redundant hardware while maintaining full operational flexibility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Area of stationary object

If the PU is configured to receive data from only one data bus and provide data to only one data bus, then the die area is reduced, but the flexibility of data processing is limited

Engineering Contradiction:
Improvedie areaVSAvoidflexibility of data processing
Core Design Contradiction:
Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic configurability where the processing unit can dynamically select which data bus to receive from and which bus to provide processed data to, based on real-time operational requirements. This dynamic switching capability is achieved through control logic that routes data flows adaptively, providing full flexibility without requiring permanent connections to both buses simultaneously, thus optimizing die area usage.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20260023695A1Coupling processing units to data buses in memory
Publication Date: 2026.01.22 MICRON TECHNOLOGY INC
  • US20260023695A1 patent drawing
  • US20260023695A1 patent drawing
  • US20260023695A1 patent drawing

AI summary

Coupling processing units to data buses in memory is described herein. A data bus coupled to an array of memory cells can receive first data. A processing unit (PU) can be coupled to the data bus. The PU can receive the first data from the data bus. The PU can perform a plurality of operations utilizing the first data to generate second data. The PU can provide the second data to the data bus to store the second data in the array of memory cells.