On-Chip Memory Impedance Calibration Without Extra Pins
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Solution Overview
Problem
Existing memory systems face challenges in impedance calibration, particularly in portable devices like eMMC, where extra pins for calibration are not allowed due to standard pin-out limitations, and traditional techniques require off-chip components that increase manufacturing costs and substrate real estate.
Innovation Solution
A calibration device that includes a bias circuit with an internal resistor for generating a bias current and a calibration unit that adjusts the current to a predetermined range, allowing for impedance calibration without off-chip components or additional package pins, using a single external resistor or an internal resistor for calibration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional impedance calibration techniques are used with off-chip components, then calibration accuracy is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent extracts the calibration functionality from external off-chip components and integrates it entirely within the chip. The calibration device includes a calibration signal generator, calibration signal receiver, and impedance calculator all integrated on-chip, eliminating the need for external resistors, capacitors, or other calibration components.
Solution Approach 2:
The calibration device is designed to perform multiple calibration functions using integrated on-chip components. The same calibration circuitry can calibrate different impedance values and support various calibration modes, making the device universally applicable for different calibration requirements without adding external components.
2Adaptability or versatility
If extra package pins are added for calibration, then calibration capability is improved, but ease of manufacture deteriorates
Solution Approach 1:
The calibration device reuses existing on-chip signal paths and components for calibration purposes. The calibration signal generator can utilize existing output buffers, and the calibration signal receiver can use existing input buffers, making the existing pins multi-functional for both data transmission and calibration.
Solution Approach 2:
The calibration device is fully self-contained and performs calibration autonomously without requiring external calibration equipment or additional package pins. The integrated calculator computes impedance values based on internal measurements, making the system self-sufficient.
3Measurement precision
If off-chip components are used for calibration, then calibration precision is improved, but loss of substance increases
Solution Approach 1:
The patent removes all calibration components from the external substrate environment and extracts them into the chip interior. This eliminates the need for external resistors, capacitors, and other passive components that would occupy substrate real estate.
Solution Approach 2:
The calibration functionality is merged with the existing on-chip signal processing components. The calibration signal generator, receiver, and calculator are integrated within the same chip substrate, combining calibration functions with data processing functions to minimize additional substrate usage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate IO impedance calibration in memory systems without the need for extra package pins or off-chip components, reducing manufacturing costs and substrate usage while maintaining signal integrity at higher interface speeds.
Implementation Method 1
measuring a second bias current generated by mirroring a first bias current through the internal resistor
Implementation Method 2
generating the control signal based on a comparison result between a reference voltage and a voltage generated based on the third bias current through an adjustable resistor
Data Source
AI summary
A calibration device for use in a memory system includes a bias circuit providing bias current, and a calibration unit generating a control signal for calibration. The bias circuit includes an internal resistor and measures a second bias current generated by mirroring a first bias current through the internal resistor, and adjusts the second bias current to generate the second bias current in a predetermined range as a third bias current. The calibration unit generates the control signal based on a comparison result between a reference voltage and a voltage generated based on the third bias current through an adjustable resistor.