Shared-Control Memory Circuit for Flexible Capacity Switching
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Solution Overview
Problem
Existing memory circuits in large-scale integration systems lack the ability to dynamically switch between operating as a single large-capacity memory and multiple small-capacity memories, which is necessary for different applications sharing the same memory circuit.
Innovation Solution
A memory circuit design that includes multiple memory parts with first and second memory cells, controlled by first and second memory control parts, and a shared memory control part, allowing conversion of addresses to switch between operation modes, enabling operation as both multiple small-capacity and a large-capacity memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a memory circuit is designed to operate as a single large-capacity memory, then the memory capacity is maximized, but the circuit cannot be used for applications requiring multiple small-capacity memories
Solution Approach 1:
The memory circuit is designed with a shared memory control part that can operate in multiple modes (first mode for individual memory part control, second mode for unified memory control), enabling the same hardware to function as both multiple small-capacity memories and a single large-capacity memory, thus achieving multi-functionality without requiring separate circuits for each application scenario
Solution Approach 2:
The memory control part can dynamically switch between first mode and second mode based on access requests, allowing the memory circuit to adapt its operation mode in real-time. When a second access request is received, the control part converts addresses and routes access appropriately, enabling flexible reconfiguration without physical changes to the circuit structure
2Ease of operation
If separate control circuits are provided for each memory part to enable independent control, then individual memory access is enabled, but the overall device complexity increases
Solution Approach 1:
Instead of providing separate control circuits for each memory part, the invention merges the control functions into a single shared memory control part that can handle access requests for any memory part. This consolidation reduces the total number of control circuits while maintaining the ability to independently access and control individual memory parts through address conversion and routing mechanisms
Data Source
AI summary
A memory circuit includes: a plurality of memory parts, each of which includes a plurality of first memory cells and a second memory cell that is accessed when one of the first memory cells is defective; a plurality of first memory control parts, each of which is configured to control access to a corresponding one of the plurality of memory parts based on a first access request addressing the corresponding memory part, during a first mode; and a second memory control part shared by the plurality of memory parts, and configured to control access to the plurality of memory parts based on a second access request during a second mode.