Memory Cell Biasing During Read Operations
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Solution Overview
Problem
Memory devices face challenges in reducing parasitic effects such as larger leakage currents during read operations, which can decrease functionality and reliability.
Innovation Solution
The memory device reduces the voltage applied to the memory cell during the activation phase of the read operation, biasing it to a read voltage that is less than the write voltage, thereby minimizing disturbances to other memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high voltage is applied to the memory cell during read operation, then read performance is improved, but parasitic effects such as leakage currents increase
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the voltage level applied to the memory cell during the read operation. Instead of using a fixed high voltage, the system modifies the voltage parameter based on operational requirements, thereby maintaining read performance while reducing parasitic leakage currents that occur at higher voltage levels.
2Measurement precision
If write voltage is applied to the memory cell during read operation, then read sensitivity is improved, but disturbances to other memory cells increase
Solution Approach 1:
The patent applies local quality by differentiating the voltage application between the selected memory cell and other memory cells. The write voltage is applied locally only to the specific memory cell being read, while other memory cells receive a reduced or different voltage level, thereby maintaining read sensitivity for the target cell while minimizing disturbances to neighboring cells.
Data Source
AI summary
Methods, systems, and devices for biasing a memory cell during a read operation are described. For example, a memory device may bias a memory cell to a first voltage (e.g., a read voltage) during an activation phase of a read operation. After biasing the memory cell to the first voltage, the memory device may bias the memory cell to a second voltage greater than the first voltage (e.g., a write voltage) during the activation phase of the read operation. After biasing the memory cell to the second voltage, the memory device may initiate a refresh phase of the read operation. Based on a value stored by the memory cell prior to biasing the memory cell to the first voltage, the memory device may initiate a precharge phase of the read operation.