Memory Cell Boosting Line for Lower-Voltage Resistive Memory
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Solution Overview
Problem
As semiconductor devices increase in integration density and reduce in area, the demand for higher power supply voltages to manage threshold voltage distribution and driving current increases, leading to elevated power consumption.
Innovation Solution
Incorporation of a boosting line in the semiconductor device to reduce the operating voltage below the power supply voltage, thereby reducing power consumption while maintaining data storage functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If higher power supply voltages are used to manage threshold voltage distribution and driving current in high-density semiconductor devices, then device functionality is maintained, but power consumption increases
Solution Approach 1:
A boosting line is introduced as an intermediary component between the power supply and the selection element. This boosting line receives a first voltage from the power supply and generates a second voltage (higher than the first) to apply to the selection element, enabling proper threshold voltage management and driving current without requiring the entire system to operate at high power consumption levels
Solution Approach 2:
The patent changes the voltage parameter by introducing a two-voltage system where a boosting line converts a lower first voltage from the power supply into a higher second voltage for the selection element. This parameter transformation allows the device to maintain reliability through adequate voltage levels while operating from a lower power supply voltage, thus reducing overall power consumption
Data Source
AI summary
A semiconductor device may include: a plurality of word lines extending in a first direction; a plurality of bit lines extending in a second direction, a plurality of memory cells disposed at intersections of the plurality of word lines and the plurality of bit lines, respectively, each memory cell structured to include a variable resistance element configured to store data by exhibiting different resistance values and a selection element connected to the variable resistance element in series to selectively connect or disconnect the variable resistance element to the pair of the corresponding bit line and word line; and a boosting line connected to a portion of the selection element that is between one end of the selection element, which is connected to one of the word line and the bit line, and another end of the selection element, which is connected to the variable resistance element.