Memory Cell Current-Path Separation for Low-Leakage Programming
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Solution Overview
Problem
Existing memory cell programming methods face issues with leakage currents and reduced reliability due to high program voltages applied to the gate terminal of program transistors, leading to unintended breakdowns and stress on unselected cells.
Innovation Solution
Applying program voltage to the source/drain of the program transistor instead of the gate terminal, with separate current paths for programming and reading, thereby avoiding gate-induced leakage and reducing stress on unselected cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high program voltage is applied to the gate terminal of program transistors, then programming function is achieved, but leakage currents increase and reliability decreases
Solution Approach 1:
The patent extracts the harmful gate-induced leakage current path from the system by applying program voltage to the source/drain terminal instead of the gate terminal. This separation removes the source of leakage current generation while preserving the programming function through alternative voltage application methodology.
Solution Approach 2:
The patent introduces separate current paths as intermediary channels for programming and reading operations. By using distinct paths for different operations, the system avoids the harmful interaction between high program voltage and gate terminal that causes leakage, while maintaining functional effectiveness.
2Reliability
If high program voltage is applied to the gate terminal, then programming is achieved, but unintended breakdowns occur in unselected cells
Solution Approach 1:
The patent applies local quality by confining the high program voltage effect to only the selected memory cell through separate current paths. The programming voltage is localized to the target cell's source/drain terminal without affecting adjacent unselected cells, thereby preventing unintended breakdowns while maintaining programming effectiveness.
Solution Approach 2:
The patent segments the current paths for programming and reading operations, and further segments the voltage application to individual selected cells. This segmentation isolates the high voltage stress to only the intended target cell, preventing harmful effects on unselected cells while achieving reliable programming.
3Reliability
If separate current paths are used for programming and reading, then leakage is reduced, but device complexity increases
Solution Approach 1:
The patent achieves universality by designing the memory cell structure and control circuitry to handle multiple functions through a unified architecture. The same basic cell structure supports both programming and reading operations with distinct current paths, avoiding the need for completely separate hardware systems and minimizing overall complexity.
Solution Approach 2:
The patent merges the programming and reading functions within a single memory cell structure, using combined control logic to manage separate current paths. This integration approach reduces device complexity compared to having entirely separate systems, while still achieving the reliability benefits of path separation.
Data Source
AI summary
A memory device includes a bit line, a source line, a program word line, a read word line, a memory cell including a program transistor and a read transistor, and a controller. The program transistor includes a gate terminal coupled to the program word line, a first terminal coupled to the source line, and a second terminal. The read transistor includes a gate terminal coupled to the read word line, a first terminal coupled to the bit line, and a second terminal coupled to the second terminal of the program transistor. The controller is configured to, in a programming operation, cause a program current to flow through the memory cell along a first current path. The controller is further configured to, in a read operation, cause a read current to flow through the memory cell along a second current path different from the first current path.