Nonvolatile Memory Cell Dual-Pulse Rectifier On-Current
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Solution Overview
Problem
Existing nonvolatile semiconductor storage devices using PIN diodes as rectifying elements face challenges in achieving sufficient on-current for data writing and erasing, while also struggling to suppress off-current, which affects memory cell operation and power consumption.
Innovation Solution
The use of a dual-pulse method, where a first charging pulse accumulates charges in the rectifying element, followed by a second operating pulse that transitions the variable resistive element, leveraging the impact ionization phenomenon to enhance on-current and reduce off-current, is employed. This method includes the use of IMPATT diodes and other rectifying elements like PIN, PNP, and NPN diodes to control the impact ionization phenomenon.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a PIN diode is used as the rectifying element in the memory cell, then the memory cell can be configured with simple stacking structure, but the on-current is insufficient during reverse bias application
Solution Approach 1:
A charging pulse is applied before the operating pulse to preliminarily accumulate charges in the intrinsic region of the PIN diode. This preliminary charge accumulation enables the subsequent operating pulse to achieve sufficient on-current for reliable data writing and erasing operations.
Solution Approach 2:
The write/erase operation uses a two-stage periodic pulse sequence: first a charging pulse to accumulate charges, then after a predetermined interval allowing heat dissipation, an operating pulse to perform the actual data transition. This periodic action pattern optimizes both current magnitude and power consumption.
2Power
If higher voltage is applied to increase on-current, then data writing and erasing become reliable, but power consumption increases
Solution Approach 1:
The charging pulse preliminarily accumulates charges in the intrinsic region before the operating pulse is applied. This preliminary action reduces the voltage and energy required for the subsequent operating pulse to achieve the necessary on-current, thereby lowering overall power consumption.
Solution Approach 2:
The invention changes the temporal parameters of voltage application by using a two-stage pulse sequence with a predetermined interval. The charging pulse sets up charge accumulation, and after allowing heat dissipation during the interval, the operating pulse achieves the desired current with reduced energy expenditure compared to continuous high voltage application.
3Productivity
If the memory cell operates at high speed, then productivity is improved, but heat generation and off-current increase
Solution Approach 1:
The two-stage periodic pulse sequence with a predetermined interval between charging pulse and operating pulse allows heat dissipation during the interval period. This periodic action pattern enables high-speed operation while controlling heat generation and suppressing off-current by resetting the thermal state between operations.
Solution Approach 2:
The predetermined interval between pulses allows the system to skip through the harmful heat accumulation phase by briefly discontinuing operation. This brief pause enables heat dissipation and charge reset, allowing the next operating cycle to proceed with reduced off-current and heat generation, thus maintaining high productivity sustainably.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly increases the on-current while maintaining low power consumption and suppressing off-current, improving the operating speed and reducing leakage currents, thus enhancing the overall performance of the memory cell.
Implementation Method 1
leveraging the impact ionization phenomenon to enhance on-current and reduce off-current
Data Source
AI summary
A nonvolatile semiconductor storage device according to an embodiment includes a write/erase unit, during data write or erase, the write/erase unit supplying a first electric pulse to a selected memory cell, the first electric pulse having an electric energy to an extent that an physical state of a memory element of the selected memory cell does not transition and accumulating charges in a rectifying element of the selected memory cell, after supplying the first electric pulse, and a certain pulse interval thereafter, and supplying a second electric pulse to the selected memory cell, the second electric pulse having larger electric energy than the first electric pulse, the second electric pulse causing the physical state of the memory element of the selected memory cell to transition.