3D Memory Cell Read Circuit Feedback Voltage Stabilization

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Solution Overview

Problem

Current read circuits for memory cells in memory arrays face issues with voltage drops across cells after thresholding, leading to unreliable reads due to the collapse of demarcation voltage, which affects the sustainability of read current and can result in read errors.

Innovation Solution

The implementation of an active demarcation voltage source follower scheme with a feedback mechanism to mitigate voltage drops and ensure sustainable current delivery, along with a sensing architecture that uses a feedback voltage and reference current to reliably determine the logic state of memory cells, counteracting process, voltage, and temperature variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If an active demarcation voltage source follower scheme with feedback mechanism is implemented, then voltage stability post-thresholding is improved, but device complexity increases

Engineering Contradiction:
Improvevoltage stabilityVSAvoidcircuit complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where a sense amplifier monitors the demarcation voltage and adjusts the source follower output accordingly. The sense amplifier compares the actual demarcation voltage with a reference voltage and generates a feedback signal to the source follower gate, ensuring stable voltage post-thresholding while managing the complexity through controlled feedback loops.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces a sense amplifier as an intermediary component between the source follower and the memory cell array. This intermediary monitors voltage conditions and mediates the feedback control, allowing the system to achieve voltage stability without directly complicating the core source follower circuitry.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If demarcation voltage is applied for reading, then read current is generated, but voltage collapse occurs leading to unreliable reads

Engineering Contradiction:
Improveread operationVSAvoidread reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary thresholding to the memory cell before the actual read operation. This preliminary action prepares the cell by establishing an initial voltage state, and the source follower circuit is pre-configured to maintain demarcation voltage during the subsequent read operation, preventing voltage collapse and ensuring reliable reads.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The sense amplifier continuously monitors the voltage across the memory cell during the read operation and provides feedback to the source follower. This feedback mechanism detects early signs of voltage collapse and adjusts the source follower output to maintain stable demarcation voltage, ensuring read reliability throughout the operation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12062410B2Apparatus, system and method to sense a logic state of a memory cell in a three-dimensional memory device
Publication Date: 2024.08.13 INTEL CORP
  • US12062410B2 patent drawing
  • US12062410B2 patent drawing
  • US12062410B2 patent drawing

AI summary

A method, apparatus and system. The method includes: generating a feedback voltage VFB in a feedback circuit coupled to one of a bitline node (BL) or a wordline node (WL) of each of a plurality of memory cells of a memory array, the feedback voltage to, in a thresholded state of said each of the memory cells, counteract a decrease in an absolute value of a voltage Vvdm at said one of the BL or WL; generating, in a reference circuit, one of a reference voltage VREF to track a feedback voltage of the feedback circuit or a mirror current IMFBmirror to track a current Icell through said each of the memory cells; and providing one of values for both VFB and VREF, or for an output voltage Vapsout corresponding to IMFBmirror, to a sense circuitry, the sense circuitry to determine a logic state of said each of the memory cells based on a comparison of VFB with VREF or based on Vapsout.