Memory Cell Program Voltage Adjustment for Adjacent Erased Cells
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Solution Overview
Problem
Existing storage devices face reliability issues due to threshold voltage variations in memory cells, particularly when adjacent cells have different programmed statuses, leading to reduced data retention and increased error rates.
Innovation Solution
A method and device that perform an additional program operation by applying a higher program voltage to memory cells if the adjacent cell is in an erased status, ensuring consistent threshold voltage distribution and improved data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a normal program operation is performed on a first memory cell, then the program operation completes with a certain threshold voltage, but the threshold voltage may vary due to adjacent cell effects when the second memory cell is in erased status
Solution Approach 1:
The patent performs a preliminary check on the threshold voltage status of the second memory cell (adjacent cell) before finalizing the program operation on the first memory cell. Based on this preliminary detection, the system determines whether to apply an additional program voltage to ensure the first memory cell achieves the desired threshold voltage level, thereby compensating for adjacent cell effects in advance.
Solution Approach 2:
The patent changes the program voltage parameter dynamically based on the detected status of the adjacent memory cell. When the second memory cell is detected to be in erased status, the system applies an additional program voltage (higher by a preset voltage than the normal program voltage) to the first memory cell, adjusting the electrical parameter to achieve consistent threshold voltage distribution despite adjacent cell variations.
2Reliability
If no additional program voltage is applied, then the program operation is faster and simpler, but data retention and reliability are reduced due to threshold voltage variations
Solution Approach 1:
The patent applies local quality by providing different treatment to different memory cells based on their specific conditions. Instead of uniformly applying additional program voltage to all memory cells, the system selectively applies the additional voltage only to those first memory cells whose adjacent second memory cells are in erased status. This localized approach ensures reliability improvement where needed without unnecessarily slowing down the overall program operation.
Solution Approach 2:
The patent implements a feedback mechanism where the threshold voltage status of the adjacent second memory cell is detected and used to control whether an additional program voltage is applied to the first memory cell. This feedback loop allows the system to adapt the program operation based on actual device conditions, improving data retention only when necessary and maintaining high productivity when the adjacent cell status does not require additional programming.
Data Source
AI summary
Provided herein is a method of operating a memory device configured to perform a program operation on a first memory cell coupled to a selected word line. The method includes determining, after the program operation on the first memory cell has been performed, whether a threshold voltage of a second memory cell coupled to a same bit line to which the first memory cell is coupled and coupled to a word line adjacent to the selected word line corresponds to an erased status. The method also includes applying to the first memory cell, when the threshold voltage of the second memory cell corresponds to the erased status, an additional program voltage higher by a preset voltage than a program voltage last applied during the program operation.