Multi-level Memory Cell Programming with Adaptive Bias Voltage
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Solution Overview
Problem
Current multi-level memory cell programming methods are slow due to the need for conservatively selected initial bias voltages, which result in a large number of programming and verification steps, leading to inefficient programming speed.
Innovation Solution
A method that iteratively changes bias voltages and records the voltage when memory cells reach predetermined threshold states, allowing for dynamic determination of initial bias voltages for programming subsequent states, thereby reducing the number of programming steps and increasing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conservatively selected initial bias voltages are used for programming multi-level memory cells, then programming accuracy and reliability are improved, but programming speed deteriorates due to a large number of programming and verification steps
Solution Approach 1:
The patent applies preliminary action by performing a first programming operation to a first threshold state before programming to lower threshold states. This preliminary programming establishes a foundation that enables more aggressive bias voltage selection in subsequent operations, allowing the system to achieve both high reliability and improved speed by reducing the number of verification steps needed in later programming phases.
Solution Approach 2:
The patent implements dynamics by adaptively selecting initial bias voltages for subsequent programming operations based on the results of previous programming operations. Instead of using fixed conservative voltages throughout, the system dynamically adjusts bias voltage levels according to the actual state of the memory cells, enabling faster programming while maintaining accuracy through data-driven voltage selection.
2Manufacturing precision
If a large number of programming and verification steps are performed to ensure accurate threshold state programming, then programming precision is improved, but programming time increases
Solution Approach 1:
The patent performs preliminary programming to a first threshold state with high precision verification before proceeding to lower threshold states. This preliminary action ensures that the foundation is correctly established, allowing subsequent operations to use fewer verification steps since the preliminary programming has already validated the approach and established accurate cell states.
Solution Approach 2:
The patent segments the programming process into distinct phases: a first programming operation to a first threshold state followed by subsequent programming operations to lower threshold states. This segmentation allows different verification strategies to be applied to different segments - rigorous verification in the first phase, and reduced verification in subsequent phases where the adaptive bias selection already provides precision guarantees.
3Measurement precision
If iterative programming with verification is used to program multi-level memory cells, then state accuracy is improved, but the number of programming steps increases
Solution Approach 1:
The patent performs a preliminary programming operation with full iterative verification to establish a first threshold state. This preliminary action creates a validated template for subsequent programming operations, allowing the system to reduce the number of verification steps in later operations while maintaining accuracy, because the preliminary operation has already demonstrated the effectiveness of the approach.
Solution Approach 2:
The patent dynamically adjusts the programming approach by using adaptive bias voltage selection in subsequent operations based on results from previous operations. This dynamic adaptation reduces the need for repeated verification steps, as the system learns from previous operations and adjusts its strategy accordingly, thereby reducing overall complexity while maintaining precision.
Data Source
AI summary
A method for programming a plurality of multi-level memory cells described herein includes iteratively changing a bias voltage applied to a first memory cell to program the first memory cell to a first threshold state and detecting when the first cell reaches a predetermined threshold voltage. The bias voltage applied to the first memory cell upon reaching the predetermined threshold voltage is recorded. A second memory cell is programmed to a second threshold state by applying an initial bias voltage to the second memory cell which is function of the recorded bias voltage.