Memory Cell Programming Method Minimizing Program Disturb
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Solution Overview
Problem
Existing methods for reducing program disturb in memory cells are complex and require additional control over bit line voltages of both programmed and unprogrammed cells, making them difficult to operate effectively.
Innovation Solution
A method that involves finding an initial programming condition, selecting two parameters as variables for a program disturb test, performing the test for multiple combined values, and applying the resulting programming condition with minimum program disturb to minimize disturbances during memory cell programming, without requiring additional control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a ground voltage is applied to the bit line of the memory cell to be programmed and a high voltage is applied to the bit line of adjacent memory cells, then program disturb is decreased, but device complexity and ease of operation worsen due to the need to control multiple bit line voltages simultaneously
Solution Approach 1:
The patent extracts the voltage control function from the bit line and relocates it to the word line. By applying different voltages to different word lines (first word line vs. second word line) instead of controlling multiple bit line voltages, the method simplifies the control architecture while maintaining the ability to selectively program memory cells and minimize program disturb in adjacent cells.
Solution Approach 2:
The word line is given multiple functions: it serves as both the selection line for targeted memory cells and the voltage control line for minimizing program disturb in adjacent cells. This multi-functionality eliminates the need for separate control lines, reducing device complexity while achieving the same protective effect.
2Object-affected harmful factors
If multiple bit line voltages are controlled to decrease program disturb, then program disturb is reduced, but ease of operation deteriorates due to the difficulty of coordinating multiple voltage controls
Solution Approach 1:
The patent removes the complex multi-voltage bit line control mechanism and extracts the essential function (voltage differentiation for selectivity) to the word line control. This simplifies operation to a single control interface (word line voltages) while preserving the ability to distinguish between selected and unselected memory cells.
Solution Approach 2:
Instead of controlling bit line voltages to achieve selectivity and protect adjacent cells (conventional approach), the patent inverts the control strategy by using word line voltage differentiation. This reversal simplifies the control logic and improves ease of operation while achieving the same protective effect against program disturb.
Data Source
AI summary
The present invention provides a method for decreasing program disturb in memory cells, comprising: finding an initial programming condition that ensures programming memory cell normally; selecting two parameters from the initial programming condition as variables for a program disturb test; performing the program disturb test to the memory cell for at least two combined values of the variables; obtaining a programming condition with minimum program disturb based on the result of the program disturb test; and applying the programming condition with minimum program disturb as the programming condition for memory cell. The method according to the present invention can minimize the program disturb in memory cells and can be performed easily.