Memory Cell Programming Verification Security Margin
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Solution Overview
Problem
Conventional programming methods for non-volatile memory cells permanently exclude verified memory cells from further programming pulses, leading to potential errors due to changes in biasing conditions, requiring multiple reference voltages/currents, and increasing costs and risk of incorrect data storage.
Innovation Solution
A method where memory cells continue to undergo program verify operations until all cells reach the target programming state, with an extra programming pulse applied after initial verification to ensure a sufficient security margin, and further pulses applied if verification fails, ensuring accurate programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory cells are permanently excluded from further programming pulses after initial verification, then programming speed is improved, but programming reliability deteriorates due to potential assessment errors from biasing condition changes
Solution Approach 1:
The patent implements continuous verify operations on all memory cells throughout the programming process, rather than stopping verification after initial success. This ensures that cells previously assessed as programmed can be re-evaluated if biasing conditions change, maintaining programming reliability while allowing the process to continue efficiently.
Solution Approach 2:
The patent employs a feedback mechanism where verification results are continuously monitored and used to determine subsequent programming actions. Cells that were initially verified as programmed can receive additional programming pulses if later verification fails, and the system adapts its behavior based on the current state of all cells, ensuring reliable programming assessment.
2Reliability
If multiple reference voltages/currents are used to account for biasing condition changes, then programming reliability is improved, but device complexity increases
Solution Approach 1:
The patent enables the memory system to self-correct programming assessment errors by continuously re-evaluating cell states using the existing verification infrastructure. Rather than adding complex external reference voltage systems, the method uses the memory's own verify operations to detect and correct errors, reducing the need for additional complex hardware components.
3Loss of time
If verify operations are stopped after initial success, then loss of time is reduced, but loss of information increases due to potential incorrect data storage
Solution Approach 1:
The patent maintains continuous verification operations throughout the programming process, ensuring that data accuracy is preserved by detecting and correcting any assessment errors that may arise from biasing condition changes, while the overall process efficiency is maintained through parallel processing and optimized verification sequences.
Data Source
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AI summary
A method of electrically programming a memory cell, comprising: applying at least one electrical programming pulse to the memory cell; verifying the reaching of a target programming state by the memory cell; repeating the acts of applying and verifying until the reaching of a target programming state by the memory cell is assessed. After the reaching of a target programming state by the memory cells is assessed, at least one further electrical programming pulse is applied thereto, and the memory cell is verified at least one more time after applying the further programming pulse. In case, as a result of said further verifying, the reaching of the target programming state by the memory cell is not assessed, the method provides for applying a still further programming pulse to the memory cell.