Memory Cell Programming with Quasi-Low Verify and Quick Pass Write

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing non-volatile semiconductor memory devices face challenges in accurately programming threshold voltage ranges, leading to wide distributions and inefficiencies in programming time and speed.

Innovation Solution

A memory apparatus and method that apply program pulses to word lines, verify threshold voltages at multiple levels, and adjust bit line voltages based on the threshold voltage of memory cells to achieve precise programming.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional programming methods are used, then programming is simpler and faster, but threshold voltage distribution becomes wide and programming accuracy deteriorates

Engineering Contradiction:
Improvethreshold voltage programming accuracyVSAvoidprogramming time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The programming process is segmented into multiple passes, with each pass targeting specific threshold voltage ranges. The method divides the programming task into coarse programming (first pass) and fine programming (second pass), where each pass uses optimized pulse sequences tailored to its specific voltage range requirements. This segmentation allows accurate programming without requiring a single lengthy process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first pass performs preliminary programming to establish initial threshold voltage ranges before the second pass refines them. By pre-positioning memory elements in appropriate voltage ranges during the first pass, the second pass only needs to perform minor adjustments, significantly reducing total programming time while maintaining accuracy.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If multiple programming passes are used, then threshold voltage distribution narrows, but programming time increases

Engineering Contradiction:
Improvethreshold voltage distribution widthVSAvoidprogramming speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The programming method dynamically adapts the number of passes and pulse parameters based on the target threshold voltage range. Different voltage ranges are programmed in different numbers of passes with optimized pulse sequences for each range, allowing the system to achieve narrow distributions only where necessary while maintaining high speed for other cases.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The method changes programming parameters (pulse amplitude, duration, number of pulses) based on the target threshold voltage range. Each range has optimized parameters that achieve the desired distribution width in the minimum number of passes, preventing unnecessary programming operations that would waste time.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If verify bit line voltage is adjusted based on threshold voltage, then programming accuracy improves, but control complexity increases

Engineering Contradiction:
Improveprogramming accuracyVSAvoidcontrol circuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Verify bit line voltages are predetermined and pre-configured for different threshold voltage ranges. The control circuit simply selects from these pre-established voltage levels based on the target range, rather than dynamically calculating optimal voltages in real-time. This preliminary preparation maintains high accuracy while minimizing control complexity.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces programming time while achieving narrow threshold voltage distributions, improving the accuracy and efficiency of data storage in non-volatile memory devices.

Implementation Method 1

Both the traditional EEPROM and the flash memory utilize a floating gate that is positioned above and insulated from a channel region in a semiconductor substrate. The threshold voltage (Vth) of the transistor thus formed is controlled by the amount of charge that is retained on the floating gate.

Methodology Applied
Scientific EffectElectrostatic charge storage: Electrostatics

Implementation Method 2

A control means is provided which applies each of a plurality of program pulses to selected ones of the plurality of word lines

Methodology Applied
Scientific EffectCharge injection via electric field: Electric Field

Implementation Method 3

Following each of the plurality of program pulses and for each one of the memory cells, the control means is configured to determine whether the threshold voltage of the one of the memory cells detected exceeds a lower verify level and a higher verify level

Methodology Applied
Scientific EffectElectrical conduction measurement: Conduction (electrical)

Data Source

PatentUS12586653B2Quick pass write with quasi-low verify high level
Publication Date: 2026.03.24 SANDISK TECHNOLOGIES LLC
  • US12586653B2 patent drawing
  • US12586653B2 patent drawing
  • US12586653B2 patent drawing

AI summary

A memory apparatus includes memory cells connected word lines. The memory cells are configured to store a threshold voltage corresponding to data states and are disposed in memory holes coupled to bit lines. A control means is configured to apply program pulses to selected ones of the word lines. Following each of the program pulses and for each one of the memory cells, the control means determines whether the threshold voltage of the one of the memory cells detected exceeds a lower verify level and a higher verify level of one of the data states targeted while applying one of a plurality of verify bit line voltages to ones of the bit lines coupled to the memory cells being programmed. The one of the plurality of verify bit line voltages is selected based on the threshold voltage of the one of the memory cells.