Memory Cell Read Compensation for Programming Speed Variations
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Solution Overview
Problem
In three-dimensional memory structures, variations in programming speeds among memory cells lead to differences in operational characteristics, causing challenges in accurate data retrieval due to differing threshold voltage increases during programming pulses.
Innovation Solution
The memory system employs distinct read parameters for sets of memory cells with different programming speeds, including varying read reference voltages, sensing times, and bit line voltages to compensate for these differences, ensuring accurate data retrieval by adjusting parameters such as applying a first set of read parameters to faster programming cells and a second set to slower programming cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single set of read parameters is used for all memory cells, then the read operation is simple and fast, but reading accuracy deteriorates due to different programming speeds causing different threshold voltage increases
Solution Approach 1:
The patent divides memory cells into multiple sets based on their programming speeds. Each set is assigned a specific read parameter set (including read reference voltage, sensing time, and bit line voltage). This segmentation allows tailored read operations for each group, improving read accuracy by compensating for different programming characteristics without requiring individual parameter adjustment for every cell.
Solution Approach 2:
Different read parameters are applied to different sets of memory cells based on their local characteristics (programming speed). Faster programming cells use one set of read parameters while slower programming cells use another set. This local quality approach ensures that each memory cell is read with parameters optimized for its specific programming behavior, thereby improving overall read accuracy.
2Quantity of substance
If the number of data states per memory cell is increased, then more bits are stored per cell improving capacity, but differences in programming speeds among cells become more pronounced causing greater variability in threshold voltage
Solution Approach 1:
The patent segments memory cells into multiple sets based on their programming speeds, which becomes increasingly important when storing multiple bits per cell. Each set receives tailored read parameters that compensate for their specific programming characteristics. This segmentation ensures that even with multiple data states and varied programming speeds, the read operation can accurately distinguish between different threshold voltage levels corresponding to different stored bits.
Solution Approach 2:
The patent changes read parameters (read reference voltage, sensing time, bit line voltage) based on the programming speed characteristics of different memory cell sets. When memory cells store multiple data states, these parameter adjustments become crucial for maintaining read consistency. By adapting parameters to each set's programming behavior, the system reliably distingu between multiple threshold voltage levels even when programming speeds vary significantly across cells.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for effective compensation of different programming speeds, improving the read margin and reducing errors by using tailored read parameters for each set of memory cells, thereby enhancing the accuracy and reliability of data reading in three-dimensional memory structures.
Implementation Method 1
The threshold voltage (Vt) of a NAND memory cell can be set to a target Vt by programming charge into a charge storage region such as a charge trapping layer. The amount of charge stored in the charge trapping layer establishes the Vt of the memory cell.
Implementation Method 2
If the Vt of a memory cell is at or below the read reference voltage, the memory cell will conduct a significant current. If the Vt of the memory cell is above the read reference voltage, the memory cell will not conduct a significant current.
Data Source
AI summary
Technology is disclosed herein for a memory system that compensates for different programming speeds in two sets of memory cells when reading those two sets of memory cells. The memory system programs a group of the memory cells to one or more data states. In one aspect, the memory cells are not verified during programming. The group has a first set of memory cells that program at a first speed and a second set of memory cells that program at a second speed. The memory system reads the first set of the memory cells with a first set of read parameters and reads the second set of the memory cells with a second set of read parameters. The first set of read parameters are different from the second set of read parameters to compensate for the different programming speeds.