Nonvolatile Memory Cell Read Compensation for Floating Gate Coupling
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Solution Overview
Problem
The challenge in non-volatile semiconductor memory, particularly in EEPROM and flash memory devices, is the floating gate to floating gate coupling phenomenon, which leads to erroneous readings due to shifts in apparent charge storage, exacerbated by shrinking memory cell sizes and reduced spacing between word and bit lines, affecting multi-state devices more significantly.
Innovation Solution
The solution involves a read process that compensates for the coupling effect by intermixing read operations between target and neighbor memory cells, applying different voltages based on the condition of the neighbor cell to accurately determine the data state stored in the target cell, thereby reducing the impact of floating gate to floating gate coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cell size is reduced to increase storage capacity, then storage density is improved, but coupling between adjacent floating gates increases causing reading errors
Solution Approach 1:
The patent applies preliminary action by performing read operations on neighbor memory cells before reading the target memory cell. This preliminary read establishes the charge state of neighboring cells, allowing the system to compensate for their coupling effect on the target cell. The compensation value is calculated based on the neighbor cell states and applied to correct the target cell reading, thereby resolving the reading accuracy issue caused by coupling in high-density memory configurations.
2Quantity of substance
If spacing between word lines and bit lines is reduced to increase density, then storage density is improved, but coupling effect between adjacent memory cells increases
Solution Approach 1:
The patent implements feedback by using the read results from neighbor memory cells to adjust and compensate for the coupling effect on the target memory cell. The system continuously monitors the charge states of neighboring cells and uses this information to calculate compensation values that are applied to the target cell reading process. This feedback mechanism dynamically corrects for coupling effects, enabling high-density memory operation while maintaining reading accuracy.
3Measurement precision
If multiple read operations are performed with different voltages to account for neighbor cell states, then reading accuracy is improved, but read operation complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the read operation into distinct phases: first performing read operations on neighbor memory cells to determine their charge states, then using this information to guide the read operation on the target memory cell. This segmentation allows the system to handle the complexity of multiple voltage applications in a structured manner, improving reading accuracy while managing operational complexity through systematic phase separation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the coupling effect between adjacent memory cells, improving the accuracy of data reading in multi-state devices by accounting for the charge stored in neighboring floating gates, thus maintaining data integrity and reliability.
Implementation Method 1
Shifts in the apparent charge stored on a floating gate can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates
Data Source
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AI summary
Shifts in the apparent charge stored on a floating gate (or other charge storage element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other charge storing elements). To account for this coupling, the read process for a targeted memory cell will provide compensation to an adjacent memory cell (or other memory cell) in order to reduce the coupling effect that the adjacent memory cell has on the targeted memory cell. The compensation applied is based on a condition of the adjacent memory cell. To apply the correct compensation, the read process will at least partially intermix read operations for the adjacent memory cell with read operations for the targeted memory cell.