Semiconductor Memory Cell With Rectifier Element
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Solution Overview
Problem
Conventional DRAM and SRAM semiconductor devices face issues of high power consumption due to short data retention periods, requiring frequent refresh operations and large circuit areas, which hinder data retention and integration.
Innovation Solution
A semiconductor memory device with a memory cell structure comprising two transistors and a rectifier element, utilizing an oxide semiconductor layer with a dopant-added region to reduce power consumption and increase data read operations while minimizing circuit area, and employing a non-single-crystal channel formation layer to suppress light-induced deterioration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If conventional DRAM structure with one transistor and one capacitor is used, then data can be retained for a certain period, but power consumption is high due to frequent refresh operations required
Solution Approach 1:
The patent changes the fundamental operating principle from volatile memory requiring refresh to non-volatile memory using a rectifier element that maintains data without power, fundamentally altering the retention mechanism from temporary charge storage to stable rectified state storage
Solution Approach 2:
The patent extracts the capacitor component from the memory cell, replacing it with a rectifier element. This removes the need for continuous charging and refreshing, eliminating the primary source of power consumption while maintaining data retention capability
2Productivity
If conventional DRAM structure with one transistor and one capacitor is used, then data can be written and read, but the number of times data can be read to one data writing operation is one
Solution Approach 1:
The patent replaces the fragile charge-based storage with a robust rectifier-based storage that can be read multiple times without degradation, effectively creating a reusable rather than disposable data storage mechanism
Solution Approach 2:
Instead of reading data by detecting charge presence (which destroys the charge), the patent inverts the approach by using the rectifier's directional conductivity to maintain and repeatedly access the same data state without destruction
3Duration of action of stationary object
If conventional SRAM structure with six transistors is used, then data can be retained as long as power is supplied, but circuit area is large and integration is difficult
Solution Approach 1:
The patent extracts three transistors from the conventional six-transistor SRAM structure, replacing them with a single rectifier element. This reduction in component count directly shrinks the memory cell area while maintaining non-volatile data retention
Solution Approach 2:
The patent merges the functions of multiple transistors into a single rectifier element, combining switching and data retention functions into one component, thereby reducing overall circuit complexity and area
4Duration of action of stationary object
If conventional SRAM structure with six transistors is used, then data can be retained with continuous power supply, but power consumption is high
Solution Approach 1:
The patent extracts the continuous power supply requirement by replacing the active transistor-based storage with passive rectifier-based storage, eliminating the need for ongoing energy input to maintain data state
Solution Approach 2:
The rectifier element performs self-service by maintaining its rectified state without external power input, automatically preserving data through its inherent directional conductivity property without requiring continuous energy supply
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution extends data retention periods, reduces power consumption, and increases the number of data read operations per write operation while minimizing circuit area, thereby enhancing the efficiency and integration of semiconductor memory devices.
Implementation Method 1
the transistor may include an oxide semiconductor layer which includes a region to which a dopant is added. By providing the region to which the dopant is added for the oxide semiconductor layer of the transistor, miniaturization of the transistor is achieved
Implementation Method 2
the oxide semiconductor layer of the transistor can be formed using a material (also referred to as a crystal with c-axis alignment or c-axis aligned crystal; CAAC) which is non-single-crystal and includes a phase which has a triangular, hexagonal, regular triangular, or regular hexagonal atomic arrangement when seen from the direction perpendicular to the a-b plane
Data Source
AI summary
An object is at least one of a longer data retention period of a memory circuit, a reduction in power consumption, a smaller circuit area, and an increase in the number of times written data can be read to one data writing operation. The memory circuit has a first field-effect transistor, a second field-effect transistor, and a rectifier element including a pair of current terminals. A data signal is input to one of a source and a drain of the first field-effect transistor. A gate of the second field-effect transistor is electrically connected to the other of the source and the drain of the first field-effect transistor. One of the pair of current terminals of the rectifier element is electrically connected to a source or a drain of the second field-effect transistor.