Non-Volatile Memory Cell Resistance Control via Feedback Verification
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Resistance variable memory devices face challenges in achieving sufficient controllability of the resistance state of variable resistance elements due to their dependence on the physical state of the substance, leading to issues with data rewriting and asymmetry in voltage-current characteristics.
Innovation Solution
A non-volatile semiconductor memory device is designed with a control circuit that transitions memory cells between high and low resistance states by applying specific voltage polarities and verifying resistance values, preventing over-set states through iterative voltage adjustments, ensuring reliable data storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage is applied to transition memory cell resistance state, then resistance state changes occur, but over-set states occur leading to loss of controllability
Solution Approach 1:
The control circuit performs verify reads after applying set voltages to detect the resistance state of the memory cell. Based on the verify read results, the control circuit determines whether to apply additional set voltages or reset voltages, creating a feedback loop that prevents over-set states and maintains precise controllability of the resistance state.
Solution Approach 2:
The control circuit applies set voltages in iterative steps with verify reads in between, rather than applying a single excessive voltage. This partial action approach allows the system to achieve the desired low resistance state while detecting and preventing over-set conditions through intermediate verification steps.
2Measurement precision
If iterative verify reads are performed, then precise resistance control is achieved, but operation time increases
Solution Approach 1:
The control circuit performs verify reads at predetermined intervals during the set operation process. This preliminary verification approach allows early detection of when the memory cell has reached the desired resistance state, enabling the operation to terminate promptly and avoiding unnecessary time consumption.
3Reliability
If reset voltage is applied before next set voltage, then over-set prevention is achieved, but voltage switching complexity increases
Solution Approach 1:
The control circuit uses verify read results to feedback-determine the appropriate voltage sequence. When over-set conditions are detected, the control circuit automatically applies reset voltages before subsequent set voltages, creating an adaptive control mechanism that manages voltage switching complexity through intelligent decision-making based on real-time resistance state monitoring.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables precise control over memory cell resistance states, preventing over-set conditions and ensuring reliable data storage and retrieval, thereby enhancing the controllability and efficiency of resistance variable memory devices.
Implementation Method 1
The memory cells are stacked on the first wires, brought into a low resistance state by application of voltage of a first polarity, and brought into a high resistance state by application of voltage of a second polarity different from the first polarity
Data Source
AI summary
A non-volatile semiconductor memory device includes a cell array layer including a first wire, a memory cell, and a second wire, and a control circuit. When performing set operation for setting the memory cell to a low resistance state, until a resistance value of the memory cell becomes lower than a predetermined resistance value, the control circuit repeating: applying a first voltage for setting to the memory cell; and a verify read verifying that the resistance value of the memory cell has become lower than the predetermined resistance value. After the verify read, the control circuit applies a second voltage having a different polarity from the first voltage to the memory cell before applying the first voltage that follows.