Memory Cell Selector Element Amplifies Read Margin
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Solution Overview
Problem
Parasitic resistance in bit lines and word lines of memory devices degrades the read margin, leading to potential errors and the need for more complex and larger sense amplifiers in memory operations.
Innovation Solution
Incorporating a selector element with a negative-resistance property in memory cells, which amplifies data before output and selectively switches between logic states, thereby improving the read margin without requiring external amplification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If parasitic resistance is present in bit lines and word lines, then the memory device can operate with simple circuitry, but the read margin decreases leading to potential errors
Solution Approach 1:
The patent converts the harmful parasitic resistance into a beneficial effect by utilizing the negative-resistance property of the selector element. The selector element's negative resistance characteristic actively compensates for and counteracts the parasitic resistance in the bit lines and word lines, transforming the harmful parasitic effect into a useful signal amplification mechanism that improves read margin and eliminates read errors.
Solution Approach 2:
The selector element with negative-resistance property acts as an intermediary component between the memory element and the read circuitry. It mediates the signal transmission by providing built-in amplification that compensates for signal degradation caused by parasitic resistance, thereby improving read margin without requiring additional external amplification circuits.
2Reliability
If parasitic resistance decreases read margin, then a larger and more complicated sense amplifier is needed, but this increases device complexity and area
Solution Approach 1:
The selector element provides self-service amplification by utilizing its inherent negative-resistance property to compensate for signal degradation. This built-in amplification mechanism eliminates the need for external sense amplifiers or additional amplification circuits, thereby reducing device complexity and area while maintaining reliable read operations with sufficient read margin.
Solution Approach 2:
The patent extracts the amplification function from the external sense amplifier circuitry and integrates it directly into the selector element of the memory cell. By taking out the amplification requirement from the external circuit and embedding it within the cell structure, the design eliminates the need for large and complicated external sense amplifiers, reducing overall device complexity.
3Ease of manufacture
If parasitic resistance is present, then the memory device can be manufactured with standard processes, but the margin between logic states decreases increasing error risk
Solution Approach 1:
The patent changes the electrical parameter characteristics of the selector element by utilizing its negative-resistance property. This parameter change enables the selector element to provide signal amplification that compensates for the degradation caused by parasitic resistance, thereby maintaining sufficient margin between logic states while continuing to use standard manufacturing processes without requiring complex or specialized fabrication techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the read margin of memory operations by utilizing the negative-resistance property of the selector element, reducing the need for complex external amplification and improving data output accuracy.
Implementation Method 1
Each of the at least one memory cell may include a selector element configured to select the memory element for a read operation and amplify the data stored in the memory element in the read operation. The selector element of the memory cell may have a negative-resistance property.
Data Source
AI summary
A memory device that includes at least one memory cell is introduced. Each of the at least one memory cell is coupled to a bit line and a word line. Each of the at least one memory cell includes a memory element and a selector element, in which the memory element is configured to store data of the at least one memory cell. The selector element is coupled to the memory element in series and is configured to select the memory element for a read operation and amplify the data stored in the memory element in the read operation.