Two-Terminal Memory Cell Access With Preset Threshold Stabilization
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Solution Overview
Problem
Existing nonvolatile memory devices with resistance variable elements face limitations in design flexibility and integration level due to the use of field effect transistors (FETs), which are three-terminal devices, leading to challenges in achieving higher capacity, faster writing/reading speeds, and longer service life.
Innovation Solution
A memory device utilizing a two-terminal switching device, such as an ovonic threshold selector (OTS), coupled with a phase change memory element, allows for access control through a voltage difference across a word line and a bit line, enabling a hysteresis characteristic to improve design flexibility and integration, and a preset operation to stabilize threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If FETs are used to control access of resistance variable elements, then high on/off ratio and leakage current prevention are achieved, but design flexibility and integration level are significantly limited
Solution Approach 1:
The patent merges the selector and memory element into a single two-terminal device structure, eliminating the need for separate FET control elements. This integration removes the three-terminal constraint of FETs while maintaining access control functionality through voltage difference application between word line and bit line, thereby improving design flexibility without sacrificing reliability
Solution Approach 2:
The two-terminal switching device serves multiple functions: it acts as both the access control element (replacing FET) and the memory storage element. This multi-functionality eliminates the need for separate control and storage components, enabling higher integration levels and design flexibility while maintaining the high on/off ratio and leakage prevention characteristics
2Reliability
If FETs are used to control access of resistance variable elements, then high on/off ratio is achieved, but integration level is significantly limited
Solution Approach 1:
The patent combines the access control function and memory storage function into a single two-terminal device, reducing the number of components needed. This merging eliminates the complex three-terminal FET structure while maintaining the high on/off ratio through voltage difference control, thereby significantly improving integration level
Solution Approach 2:
The patent extracts the essential control function from the FET structure, retaining only the voltage-controlled resistance switching capability. By removing the gate terminal and associated control circuitry, the design achieves higher integration while preserving the high on/off ratio characteristic through simplified voltage difference application
3Reliability
If threshold voltage stabilization is implemented through preset operations, then data integrity is improved, but additional operational steps are required
Solution Approach 1:
The patent applies preliminary preset operations to stabilize the threshold voltage of the two-terminal device before actual read/write operations. This preliminary action ensures that the device operates within optimal voltage parameters, improving data integrity. The preset operation is performed once initially, and subsequent operations benefit from the stabilized characteristics, minimizing the impact on operational speed
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances data integrity and operational reliability by stabilizing threshold voltages, providing a wider memory window and larger current margin for reading and writing operations, thus improving the device's performance and service life.
Implementation Method 1
enabling a hysteresis characteristic to improve design flexibility and integration
Implementation Method 2
A memory device utilizing a two-terminal switching device, such as an ovonic threshold selector (OTS), coupled with a phase change memory element
Data Source
AI summary
Operating method, memory system, and control circuit are provided. The operating method is for operating a memory device comprising a selector and a memory element serially coupled to the selector. The operating method comprises presetting the memory device by providing a preset signal to the memory device, wherein the preset signal is clamped at a first current; and accessing the memory device by providing an access signal to the memory device, wherein a second current greater than the first current flows through the memory device when the access signal is provided to the memory device.