Semiconductor Memory Cell Transistor Back Bias Control
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Solution Overview
Problem
Existing semiconductor devices face challenges in reliably providing forward or backward currents to memory cells based on data to be written, which affects the switching of resistance states and data storage efficiency.
Innovation Solution
The semiconductor device incorporates a configuration of transistors and voltage provision transistors that adjust input voltages and back bias voltages based on data polarity, enabling the provision of forward or backward currents to memory cells, thereby improving data storage reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If forward or backward current is provided to memory cell based on data polarity, then data storage reliability is improved, but transistor stress increases
Solution Approach 1:
The patent dynamically adjusts the back bias voltage applied to the column transistor and row transistor based on the data polarity being written. When writing data requiring forward current, a first back bias voltage is applied; when writing data requiring backward current, a second back bias voltage is applied. This dynamic adjustment optimizes transistor performance for each operation type while managing stress accumulation.
Solution Approach 2:
The patent changes the electrical parameters (back bias voltage levels) of the transistors based on the operation type. By switching between different back bias voltage levels depending on whether forward or backward current is needed, the system adapts transistor characteristics to match operational requirements, improving reliability while controlling stress.
2Productivity
If current direction is switched based on data polarity, then data storage efficiency is improved, but control complexity increases
Solution Approach 1:
The patent applies the appropriate back bias voltage to the transistors before the actual write operation begins. By pre-configuring the transistor biasing state according to the data polarity that will be written, the system prepares the circuit for optimal performance, enabling efficient current direction switching without adding complex real-time control mechanisms.
Solution Approach 2:
The patent uses the data polarity information as feedback to determine the appropriate back bias voltage configuration. The system monitors what data is being written and automatically adjusts the transistor biasing accordingly, creating a closed-loop control system that optimizes current direction based on operational requirements without manual intervention.
Data Source
AI summary
A semiconductor device may include a memory cell connected to a first line and a second line, at least one of first transistors each configured to provide a first input voltage of a first node to the first line, and at least one of second transistors each configured to provide a second input voltage of a second node to the second line. Polarities of the first and second input voltages provided to the first and second nodes may be determined based on data to be written in the memory cell. At least one of a voltage of each of control terminals of the first and second transistors and a back bias voltage of each of the first and second transistors is adjusted in response to a change in the polarity of each of the first and second input voltages.