Memory Cell Transistor Segmentation for Speed and Reliability
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Solution Overview
Problem
Flash memory cells with high-withstand-voltage transistors operate slowly due to thick gate insulating films, and existing solutions complicate programming operations by increasing circuit complexity and load on bit lines, slowing down memory cell speed.
Innovation Solution
A memory system with a plurality of memory cells, each comprising a memory transistor and a selection transistor, where specific voltage drivers manage the control gate, selection gate, source, and bit lines to optimize programming operations, ensuring fast programming without delaying the operating speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-withstand-voltage transistors are used in memory cells, then data retention reliability is improved, but operating speed deteriorates
Solution Approach 1:
The patent divides the transistor population into two segments: high-withstand-voltage transistors for memory cells (requiring high reliability) and ordinary withstand-voltage transistors for selection transistors (requiring high speed). This segmentation allows each component to be optimized for its specific function, resolving the contradiction between reliability and speed.
Solution Approach 2:
Different parts of the memory array are assigned different transistor characteristics. Memory transistors use thick gate insulating films for high withstand voltage and reliability, while selection transistors use thin gate insulating films for high speed. This local differentiation of quality allows the system to achieve both high reliability and high speed simultaneously.
2Speed
If selection transistors with ordinary withstand voltages are used, then operating speed is improved, but device complexity increases
Solution Approach 1:
The patent employs a universal transistor structure with a single floating gate that serves multiple functions: it acts as both the memory storage element and the selection control element. This multi-functionality reduces the need for separate control circuits and simplifies the overall device architecture while maintaining high operating speed.
Solution Approach 2:
The selection transistor's gate is merged with the memory transistor's floating gate, combining the selection control function and data storage function into a single structural element. This merging reduces circuit complexity by eliminating separate control circuits while allowing the selection transistor to operate at high speed.
3Productivity
If programming operations are optimized for speed, then productivity is improved, but harmful factors increase
Solution Approach 1:
The patent introduces a selection transistor as an intermediary component between the bit line and the memory transistor. This selection transistor acts as a mediator that controls current flow to ensure that high-voltage programming current is applied only to the selected memory cell, preventing harmful current flow in unprogrammed cells while maintaining high programming speed.
Solution Approach 2:
The selection transistor is activated in advance before the high-voltage programming pulse is applied to the memory transistor. This preliminary action ensures that the selection transistor is already in the conductive state, ready to allow current flow only to the selected cell during the programming operation, thereby preventing harmful current flow in unprogrammed cells.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the operating speed of memory cells by efficiently managing voltages across memory and selection transistors, reducing circuit complexity and preventing current flow in unprogrammed cells, thus improving overall memory performance.
Implementation Method 1
a memory transistor MT and a selection transistor ST coupled to the memory transistor MT
Implementation Method 2
Because the high-withstand-voltage transistor has a thick gate insulating film
Data Source
AI summary
A memory includes a plurality of memory cells each of which includes a memory transistor and a selection transistor; a control gate line; a selection gate line; a source line; a bit line; a first driver that sets the control gate line and the selection gate line at a first voltage in a program operation; a second driver that sets the source line at a second voltage in the program operation, and sets the source line at a third voltage higher than the second voltage while the control gate line and the selection gate line are set at the first voltage; and a third driver that sets the bit line at a fourth voltage after the source line is set at the second voltage, the bit line being coupled to a memory cell being programmed.