Nonvolatile Memory Cell Voltage Configuration for Leak Current Suppression
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Solution Overview
Problem
Nonvolatile memory devices with 2Tr cells face challenges in reducing leak current, which can lead to errors in data judgment due to threshold voltage variations of selection transistors, affecting the reliability and power consumption.
Innovation Solution
The nonvolatile semiconductor memory device applies specific voltage configurations to the well and gate of selection and memory transistors, ensuring the first voltage applied to the well and source of the memory transistor is smaller than the absolute value of the second voltage applied to the gate of the selection transistor in non-selected cells, thereby reducing leak current and improving data judgment reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional voltage application is used in 2Tr cell nonvolatile memory, then data read operation can be performed, but leak current increases due to threshold voltage variations of selection transistors
Solution Approach 1:
The patent applies different voltage levels to the well and source of the memory transistor depending on whether the memory cell is selected or non-selected. For non-selected cells, a first voltage is applied to suppress leak current, while for selected cells, a second voltage enables proper data read operation. This parameter change approach resolves the contradiction by dynamically adjusting voltage levels to eliminate leak current without compromising data read functionality.
2Measurement precision
If higher voltage is applied to reduce leak current, then data judgment accuracy improves, but power consumption increases
Solution Approach 1:
The patent applies voltage selectively to specific regions (well and source of memory transistor) based on the selection state of the memory cell. Only non-selected cells receive the voltage treatment for leak current suppression, while selected cells maintain normal operation voltages. This local quality approach ensures data judgment accuracy is improved where needed without unnecessarily increasing power consumption across the entire memory array.
Data Source
AI summary
A nonvolatile semiconductor memory device includes a selection transistor and a memory transistor that are formed on a well for each of a plurality of memory cells. At a time of a data read from the memory transistor, a first voltage is applied to the well and a source of the memory transistor, and a second voltage is applied to a gate of the selection transistor included in a non-selected memory cell among the plurality of memory cells. The first voltage is smaller than an absolute value of the second voltage.