Nonvolatile Memory Cell Voltage Selection
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Solution Overview
Problem
Nonvolatile semiconductor memory devices face increased writing time due to variations in manufacturing processes, which result in characteristic differences among memory cells, leading to inefficient data writing when using uniform program voltages.
Innovation Solution
The implementation of a nonvolatile semiconductor memory device that performs writing operations based on the characteristics of each memory cell by selecting one of multiple program voltages through a pre-programming verification operation, applying a relatively low program voltage to cells with low erasure levels and a high program voltage to cells with high erasure levels, thereby reducing the number of writing loops and overall writing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a uniform program voltage is applied to all memory cells, then the manufacturing process is simple, but the writing time increases due to characteristic differences among memory cells
Solution Approach 1:
The patent applies different program voltages to different memory cells based on their individual characteristics. Specifically, memory cells are divided into groups (e.g., first group and second group) and each group receives a different program voltage level. This local differentiation resolves the contradiction by maintaining manufacturing simplicity while adapting to characteristic variations, thereby reducing overall writing time.
Solution Approach 2:
The patent changes the program voltage parameter based on memory cell characteristics. By performing a verification operation to determine threshold voltage levels, the system adjusts the program voltage applied to different cells or groups of cells. This parameter adaptation allows efficient writing without requiring complex manufacturing processes.
2Speed
If a high program voltage is applied to all memory cells, then writing speed is improved, but interference between adjacent cells increases
Solution Approach 1:
The patent applies high program voltage only to specific memory cells that require it, rather than uniformly to all cells. By identifying cells with higher threshold voltages through verification operations and applying elevated program voltage only to those cells, the system achieves fast writing speed while limiting interference to only the necessary cells, not all adjacent cells.
Solution Approach 2:
The patent uses partial action by applying the high program voltage to only a subset of memory cells that need additional programming effort. This partial application of excessive voltage avoids the harmful interference that would result from applying high voltage to all cells, while still achieving the necessary writing speed for cells that require it.
3Manufacturing precision
If pre-programming verification is performed for each memory cell, then writing accuracy is improved, but the complexity of the control circuit increases
Solution Approach 1:
The patent segments memory cells into groups based on their threshold voltage characteristics. Instead of performing verification operations on each individual cell, the system performs verification on representative cells within each group and applies the determined program voltage to all cells in that group. This segmentation reduces control circuit complexity while maintaining writing accuracy through group-based characterization.
Solution Approach 2:
The patent makes the verification result universal by applying it to multiple cells. A single verification operation on a representative cell determines the program voltage for an entire group of cells with similar characteristics. This multi-functionality approach reduces the number of verification operations needed, thereby reducing control circuit complexity while preserving writing accuracy.
Data Source
AI summary
A nonvolatile semiconductor memory device includes a memory cell array having nonvolatile memory cells in which one of multiple values is programmable therein by setting one of a plurality of threshold values therein and a control circuit that performs a writing operation on the memory cells. The writing operation performed by the control circuit includes a pre-programming verification operation to determine a threshold level of a memory cell in an erasure state, and a program operation in which a program voltage is selected from a plurality of program voltages on the basis of a determination result of the pre-programming verification operation.