Memory System Chain Enumeration for Reduced-Pad LUN Identification
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Solution Overview
Problem
The integration of multiple logic units in a single memory package requires a large number of LUN addressing pads and bounding wires, leading to complex fabrication processes and increased costs.
Innovation Solution
A memory system with a configuration that dynamically enumerates identifiers for each logic unit, utilizing a chain connection of logic units with control circuits to transmit and receive data signals, and enumerates identifiers based on the count number of state transition edges of these signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple logic units are integrated in a single package with LUN addressing pads, then each logic unit can be identified, but the number of pads and wires increases leading to complex fabrication and high cost
Solution Approach 1:
The patent extracts the identifier determination function from physical pads and wires, moving it to a software-based enumeration process. Instead of having dedicated LUN addressing pads for each logic unit, the system uses a single data line to dynamically assign identifiers through software enumeration, eliminating the need for complex physical addressing infrastructure.
Solution Approach 2:
The patent replaces the mechanical/physical system of LUN addressing pads and wires with a software-based enumeration mechanism. The identifier assignment is no longer determined by physical connections but by software-controlled signal transitions on a single data line, substituting hardware complexity with software intelligence.
2Reliability
If LUN addressing pads are used to identify logic units, then each unit has a fixed identifier, but the system requires many pads and bounding wires increasing cost
Solution Approach 1:
The patent introduces dynamics to the identifier assignment process. Instead of fixed identifiers determined by static pad connections, the system dynamically assigns identifiers through software enumeration. The data line transitions through multiple states during initialization, allowing flexible and adaptive identifier assignment that simplifies manufacturing.
Solution Approach 2:
The patent changes the parameter used for identifier determination from physical connection state (pad voltage levels) to software-controlled signal transitions. By monitoring the number of state changes on a single data line during enumeration, the system assigns identifiers based on dynamic parameter changes rather than static physical configurations.
3Device complexity
If dynamic enumeration is implemented, then the number of pads and wires is reduced, but a software enumeration process is required
Solution Approach 1:
The patent implements self-service through automatic software enumeration. During system initialization, the controller automatically enumerates each logic unit by monitoring data line state transitions and assigning identifiers without manual intervention. This automated process eliminates the need for manual pad configuration or external identifier assignment, making the system self-configuring.
Data Source
AI summary
A memory system with high capacity and high performance, having memory units with a type of 3D NOR flash or 3D NAND flash. The memory system comprises a plurality of logic units connected with one another in series to form a chain. Each of the logic units is a logic unit number (LUN) device having an identifier “LUN ID”, and comprises a control circuit. The control circuit communicates with a host controller through a common interface utilizing an ONFI bus and a sideband bus, and the control circuit of a corresponding logic unit may communicate with a control circuit of an adjacent logic unit through the sideband bus. The control circuits of the logic units cooperate with a host controller to perform an enumeration for the identifier “LUN ID” of each of the logic units.