Semiconductor Memory Charge-Discharge Structure for Arc-Free Etching
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in manufacturing, particularly during high aspect ratio etching processes, where arcing can occur due to voltage differences between the source line and the semiconductor substrate, leading to defects and reduced yield.
Innovation Solution
The semiconductor memory device incorporates a discharge portion with a contact and spacer structure that extends in the Z direction, penetrating the source line, and includes a stepped portion at the boundary between the far and near portions from the substrate. This structure provides a discharge path for positive charges, reducing voltage differences and preventing arcing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If high aspect ratio etching is performed to manufacture semiconductor memory devices, then manufacturing precision is improved, but arcing occurs due to voltage differences between the source line and the semiconductor substrate
Solution Approach 1:
The patent introduces a discharge portion with a contact structure that penetrates the source line as an intermediary element. This discharge portion provides a controlled path for charge discharge between the source line and substrate, preventing uncontrolled arcing during high aspect ratio etching while maintaining manufacturing precision
Solution Approach 2:
The patent extracts the charge accumulation problem by providing a dedicated discharge path through the contact structure. By separating the charge discharge function from the etching process, the patent eliminates the harmful arcing effect while preserving the benefits of high aspect ratio etching
2Reliability
If a discharge portion with contact structure is added to prevent arcing, then reliability is improved, but device complexity increases
Solution Approach 1:
The discharge portion with contact structure serves multiple functions: it provides charge discharge during etching, maintains electrical connections, and supports the source line structure. By combining multiple functions into a single integrated component, the patent improves reliability without proportionally increasing device complexity
Solution Approach 2:
The patent merges the charge discharge function with the existing source line and contact structures. The discharge portion is integrated into the source line formation process, combining arc prevention with standard manufacturing steps rather than adding separate complex systems
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The implementation of the discharge portion effectively suppresses arcing during high aspect ratio etching, improving the yield of semiconductor memory devices by reducing defects caused by voltage-related issues.
Implementation Method 1
The first insulating film insulates the source line from the first contact
Implementation Method 2
This structure provides a discharge path for positive charges, reducing voltage differences and preventing arcing
Data Source
AI summary
A semiconductor memory device according to an embodiment includes a substrate, a source line, word lines, a pillar, and a first member. The first member is provided to penetrate the source line. The first member includes a first portion which is far from the substrate, and a second portion which is near the substrate. The first member includes a first contact and a first insulating film. The first contact is provided to extend from the first portion to the second portion. The first contact is electrically connected to the substrate. The first insulating film insulates the source line from the first contact. The first member includes a stepped portion at a boundary part between the first portion and the second portion.