Memory Data Reception Chip With Internal Reference Voltage Noise Filtering

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Data reception chips face interference from external noise when accessing memories, leading to inaccuracies in data reception due to the lack of effective noise filtering and reference voltage generation within the chip.

Innovation Solution

A data reception chip is designed with a comparison module, voltage generation module, logic unit, detection module, and switching module, which generates a reference voltage to compare and filter external signals, reducing errors by tracking signal changes and compensating for noise without requiring additional pins, thereby reducing the chip's size and pin count.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the data reception chip receives external signals to access memory, then data transmission capability is improved, but the chip becomes susceptible to external noise interference

Engineering Contradiction:
Improvedata transmission capabilityVSAvoidexternal noise interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary reference voltage signal generated internally by the chip to mediate between the external data signal and the comparison operation. This internally generated reference voltage acts as a mediator that is synchronized with the operation voltage, thereby eliminating the harmful effect of external noise while maintaining data transmission capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The data reception chip generates its own reference voltage internally through a voltage generation module rather than relying on external reference voltage inputs. This self-service approach allows the chip to autonomously compensate for noise interference and maintain accurate data reception without being affected by external noise factors.

Inventive Principle:
Principle #25Self-service

2Measurement precision

If the chip uses external reference voltage inputs, then comparison accuracy is improved, but the pin count and chip complexity increase

Engineering Contradiction:
Improvecomparison accuracyVSAvoidpin count
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the reference voltage generation function into the chip itself by integrating a voltage generation module that produces the reference voltage internally. This combining of the reference voltage source with the comparison module eliminates the need for separate external reference voltage inputs, thereby reducing pin count while maintaining comparison accuracy.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The internally generated reference voltage serves multiple functions: it provides the comparison reference for data reception, synchronizes with operation voltage changes, and compensates for noise interference. This multi-functional reference voltage generation approach eliminates the need for additional dedicated reference voltage pins while maintaining measurement precision.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9536594B1Data reception chip
Publication Date: 2017.01.03 VIA ALLIANCE SEMICON CO LTD
  • US9536594B1 patent drawing
  • US9536594B1 patent drawing
  • US9536594B1 patent drawing

AI summary

A data reception chip coupled to an external memory including a first input-output pin to output first data and including a comparison module, a voltage generation module, a logic unit, a detection module and a switching module is provided. The comparison module is coupled to the first input-output pin to configure to receive the first data. The comparison module compares the first data with a first reference voltage to identify the value of the first data. The voltage generation module is configured to generate the first reference voltage. The logic unit is coupled to the comparison module and the voltage generation module and outputs at least one switching signal. The detection module detects the logic unit to generate at least one detection signal. The switching module transmits the detection signal to a test pin according to the switching signal.