Memory Circuit Detection Circuit Disrupts Current Path
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor integrated circuits (ICs) become smaller and more complex, the resistance of conductive lines within these digital devices changes, affecting operating voltages and overall IC performance.
Innovation Solution
A memory circuit is designed with a non-volatile memory cell, a sense amplifier, and a detection circuit. The detection circuit disrupts the current path between the non-volatile memory cell and the sense amplifier after the output signal is latched, reducing current resistance and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the current path is maintained between the non-volatile memory cell and the sense amplifier, then data can be continuously read, but power consumption increases
Solution Approach 1:
The detection circuit periodically disrupts the current path after latching the output signal, rather than maintaining continuous current flow. This periodic interruption reduces power consumption while still allowing data to be read at appropriate intervals, resolving the contradiction between energy efficiency and data reading capability.
Solution Approach 2:
The output signal is latched before the current path is disrupted. This preliminary latching action ensures that the data is captured and preserved before power reduction occurs, maintaining data reading capability while enabling subsequent power consumption reduction.
2Loss of energy
If the current path is disrupted after latching, then power consumption is reduced, but continuous data access is affected
Solution Approach 1:
The current path is disrupted periodically after latching operations, creating intervals of low power consumption while maintaining the ability to access data during active periods. This periodic operation reduces overall energy loss without completely preventing data access.
Solution Approach 2:
The latched output signal maintains the data state independently after the current path is disrupted, allowing the system to preserve data access capability without continuous current flow. The latched state serves the system by maintaining data availability during low-power intervals.
Data Source
AI summary
A memory circuit includes a non-volatile memory cell, a comparator and a detection circuit that includes a flip-flop. A first input terminal of the comparator is coupled to the non-volatile memory cell. A first output terminal of the comparator is configured to output a first output signal. The detection circuit is configured to latch the first output signal and disrupt a current path between the non-volatile memory cell and the detection circuit. A first input terminal of the flip-flop is coupled to the first output terminal of the comparator. A second input terminal of the flip-flop is configured to receive a first data signal. A third input terminal of the flip-flop is configured to receive a first reset signal. A first output terminal of the flip-flop is configured to generate a second output signal. A second output terminal of the flip-flop is configured to generate an inverted second output signal.